在NetFPGA-10G上破解NetCOPE

2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems Pub Date : 2011-10-03 DOI:10.1109/ANCS.2011.40

Pavol Korcek, V. Kosar, M. Zádník, Karel Koranda, Petr Kastovsky

{"title":"在NetFPGA-10G上破解NetCOPE","authors":"Pavol Korcek, V. Kosar, M. Zádník, Karel Koranda, Petr Kastovsky","doi":"10.1109/ANCS.2011.40","DOIUrl":null,"url":null,"abstract":"This paper describes the Net COPE platform porting issues to the new generation of the Net FPGA(-10G) cards. Achieved throughput and CPU utilization for various length of packets was measured. It was shown that we are able to reach maximum throughput of 12Gbps without any significant processor load. Xilinx ISE reports approximately 30% of the Net FPGA chip utilization for design running on 200MHz.","PeriodicalId":124429,"journal":{"name":"2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Hacking NetCOPE to Run on NetFPGA-10G\",\"authors\":\"Pavol Korcek, V. Kosar, M. Zádník, Karel Koranda, Petr Kastovsky\",\"doi\":\"10.1109/ANCS.2011.40\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the Net COPE platform porting issues to the new generation of the Net FPGA(-10G) cards. Achieved throughput and CPU utilization for various length of packets was measured. It was shown that we are able to reach maximum throughput of 12Gbps without any significant processor load. Xilinx ISE reports approximately 30% of the Net FPGA chip utilization for design running on 200MHz.\",\"PeriodicalId\":124429,\"journal\":{\"name\":\"2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems\",\"volume\":\"44 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ANCS.2011.40\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ANCS.2011.40","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

本文介绍了Net COPE平台向新一代Net FPGA(-10G)卡的移植问题。测量了不同长度的数据包的实现吞吐量和CPU利用率。结果表明，我们能够在没有任何显著处理器负载的情况下达到12Gbps的最大吞吐量。赛灵思ISE报告，在200MHz上运行的设计中，净FPGA芯片利用率约为30%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Hacking NetCOPE to Run on NetFPGA-10G

This paper describes the Net COPE platform porting issues to the new generation of the Net FPGA(-10G) cards. Achieved throughput and CPU utilization for various length of packets was measured. It was shown that we are able to reach maximum throughput of 12Gbps without any significant processor load. Xilinx ISE reports approximately 30% of the Net FPGA chip utilization for design running on 200MHz.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications Systems

自引率

0.00%

发文量