{"title":"用于三元内容可寻址存储器的低功耗优先编码器和多匹配检测电路","authors":"N. Mohan, Wilson W. L. Fung, M. Sachdev","doi":"10.1109/SOCC.2006.283892","DOIUrl":null,"url":null,"abstract":"Multiple match detection (MMD) circuits and priority encoders (PEs) are employed in ternary content addressable memory (TCAM) chips to detect multiple matches and to resolve the highest priority match. This paper presents novel PE and MMD circuits. Measurement results of the proposed circuits, fabricated in 0.18 mum CMOS technology, show significant (up to 70%) speed and energy improvements over the existing designs.","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"Low-Power Priority Encoder and Multiple Match Detection Circuit for Ternary Content Addressable Memory\",\"authors\":\"N. Mohan, Wilson W. L. Fung, M. Sachdev\",\"doi\":\"10.1109/SOCC.2006.283892\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Multiple match detection (MMD) circuits and priority encoders (PEs) are employed in ternary content addressable memory (TCAM) chips to detect multiple matches and to resolve the highest priority match. This paper presents novel PE and MMD circuits. Measurement results of the proposed circuits, fabricated in 0.18 mum CMOS technology, show significant (up to 70%) speed and energy improvements over the existing designs.\",\"PeriodicalId\":345714,\"journal\":{\"name\":\"2006 IEEE International SOC Conference\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2006.283892\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283892","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
摘要
在三元内容可寻址存储器(TCAM)芯片中采用多匹配检测电路和优先级编码器(pe)来检测多个匹配并求解优先级最高的匹配。本文提出了一种新型PE和MMD电路。采用0.18 μ m CMOS技术制造的拟议电路的测量结果显示,与现有设计相比,速度和能量有显著(高达70%)的改进。
Low-Power Priority Encoder and Multiple Match Detection Circuit for Ternary Content Addressable Memory
Multiple match detection (MMD) circuits and priority encoders (PEs) are employed in ternary content addressable memory (TCAM) chips to detect multiple matches and to resolve the highest priority match. This paper presents novel PE and MMD circuits. Measurement results of the proposed circuits, fabricated in 0.18 mum CMOS technology, show significant (up to 70%) speed and energy improvements over the existing designs.