SPECS:用于保护软件免受安全关键处理器错误影响的轻量级运行时机制

Matthew Hicks, C. Sturton, Samuel T. King, Jonathan M. Smith
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引用次数: 56

摘要

处理器实现勘误表仍然是一个问题,更糟糕的是,这些错误的一个子集对安全性至关重要。我们对最近商业处理器7年来的勘误表进行了分类,以了解这个问题的规模和严重性,并发现在分析的301个勘误表中,有28个是安全关键的。我们提出安全关键处理器ER- RATA捕获系统(SPECS)作为一个低开销的解决方案来解决这个问题。SPECS采用了一种动态验证策略,该策略通过将保护限制为仅对安全至关重要的处理器状态而变得轻量级。作为概念验证,我们在一个开源处理器中实现了SPECS的硬件原型。使用这个原型,我们根据14个bug对SPECS进行评估,这些bug是由我们在分类阶段发现的安全关键错误类型引起的。评估表明,当仅使用isa级状态部署时,SPECS作为防御的有效性为86%;占地面积和电力开销小于5%;并且没有软件运行时开销。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
SPECS: A Lightweight Runtime Mechanism for Protecting Software from Security-Critical Processor Bugs
Processor implementation errata remain a problem, and worse, a subset of these bugs are security-critical. We classified 7 years of errata from recent commercial processors to understand the magnitude and severity of this problem, and found that of 301 errata analyzed, 28 are security-critical. We propose the SECURITY-CRITICAL PROCESSOR ER- RATA CATCHING SYSTEM (SPECS) as a low-overhead solution to this problem. SPECS employs a dynamic verification strategy that is made lightweight by limiting protection to only security-critical processor state. As a proof-of- concept, we implement a hardware prototype of SPECS in an open source processor. Using this prototype, we evaluate SPECS against a set of 14 bugs inspired by the types of security-critical errata we discovered in the classification phase. The evaluation shows that SPECS is 86% effective as a defense when deployed using only ISA-level state; incurs less than 5% area and power overhead; and has no software run-time overhead.
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