一种可重构WSI神经网络

[1989] Proceedings International Conference on Wafer Scale Integration Pub Date : 1989-01-03 DOI:10.1109/WAFER.1989.47545

F. Blayo, P. Hurat

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引用次数: 9

摘要

提出的解决方案包括将N神经元Hopfield网络实现为由N/sup / 2/个细胞组成的收缩方阵。收缩阵列非常适合于晶圆级集成(WSI)。神经网络固有的容错性为晶圆设计提供了便利。但是，需要晶圆级的重新配置来绕过故障芯片。描述了一种开关元件的原理和结构，该元件提供了灵活的晶圆级重构。

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A reconfigurable WSI neural network

The solution presented consists of implementing the N neuron Hopfield network as a systolic square array made up of N/sup 2/ cells. Systolic arrays are well suited to wafer-scale integration (WSI). Inherent error tolerance of neural networks facilitates wafer design. However, a wafer-level reconfiguration is required to bypass faulty chips. The principle and the architecture of a switching element which provides a flexible wafer-level reconfiguration is described.<>

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[1989] Proceedings International Conference on Wafer Scale Integration

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