Yanzhao Wang, Fei Xie
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引用次数: 0

摘要

有两种流行的加速器架构:一种基于一般矩阵乘法单元,另一种基于卷积核。然而,广泛使用的深度学习编译器堆栈Tensor Virtual Machine (TVM)不支持后者。我们已经成功地将其应用于两个著名的加速器:Nvidia的NVDLA和比特大陆的BM1880。深度学习工作负载现在可以通过TVM轻松部署到这些加速器上,并有效地执行。该框架可以以最小的工作量将TVM扩展到其他加速器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Extending Tensor Virtual Machine to Support Deep-Learning Accelerators with Convolution Cores
Deep-learning accelerators are increasingly popular. There are two prevalent accelerator architectures: one based on general matrix multiplication units and the other on convolution cores. However, Tensor Virtual Machine (TVM), a widely used deep-learning compiler stack, does not support the latter. This paper proposes a general framework for extending TVM to support deep-learning accelerators with convolution cores. We have applied it to two well-known accelerators: Nvidia's NVDLA and Bitmain's BM1880 successfully. Deep-learning workloads can now be readily deployed to these accelerators through TVM and executed efficiently. This framework can extend TVM to other accelerators with minimum effort.
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