S. Fujita, K. Uchida, S. Yasuda, R. Ohba, H. Nozaki, T. Tanamoto
{"title":"Si nanodevices for random number generating circuits for cryptographic security","authors":"S. Fujita, K. Uchida, S. Yasuda, R. Ohba, H. Nozaki, T. Tanamoto","doi":"10.1109/ISSCC.2004.1332710","DOIUrl":null,"url":null,"abstract":"Small random-number-generating circuits for cryptographic security using Si nano-devices are described. The basis of these circuits is that nano-devices hold random electrical properties naturally that were previously regarded as a negative feature. Results of statistical tests indicate that these circuits generate extremely high-quality random numbers with relatively few transistors.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2004.1332710","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Si nanodevices for random number generating circuits for cryptographic security
Small random-number-generating circuits for cryptographic security using Si nano-devices are described. The basis of these circuits is that nano-devices hold random electrical properties naturally that were previously regarded as a negative feature. Results of statistical tests indicate that these circuits generate extremely high-quality random numbers with relatively few transistors.