{"title":"逻辑电路中单比特和多比特错误的在线错误检测","authors":"B. Kolla, P. Lala, K. Yarlagadda","doi":"10.1109/SSST.1992.712298","DOIUrl":null,"url":null,"abstract":"A new scheme for detecting single and multibit (unidirectional and bidirectional) errors using residue codes has been proposed. This procedure has been applied to circuits with outputs up to 8 bits. It has been shown that about 99% of all multibit errors can be detected using this scheme.","PeriodicalId":359363,"journal":{"name":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Online Error Detection for Single and Multibit Errors in Logic Circuits\",\"authors\":\"B. Kolla, P. Lala, K. Yarlagadda\",\"doi\":\"10.1109/SSST.1992.712298\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new scheme for detecting single and multibit (unidirectional and bidirectional) errors using residue codes has been proposed. This procedure has been applied to circuits with outputs up to 8 bits. It has been shown that about 99% of all multibit errors can be detected using this scheme.\",\"PeriodicalId\":359363,\"journal\":{\"name\":\"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SSST.1992.712298\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 24th Southeastern Symposium on and The 3rd Annual Symposium on Communications, Signal Processing Expert Systems, and ASIC VLSI Design System Theory","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSST.1992.712298","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Online Error Detection for Single and Multibit Errors in Logic Circuits
A new scheme for detecting single and multibit (unidirectional and bidirectional) errors using residue codes has been proposed. This procedure has been applied to circuits with outputs up to 8 bits. It has been shown that about 99% of all multibit errors can be detected using this scheme.