A. Giannakis, Daniel A. Philipps, A. Blinov, D. Peftitsis
{"title":"同步整流模式下SiC mosfet的三电平电压源栅极驱动器","authors":"A. Giannakis, Daniel A. Philipps, A. Blinov, D. Peftitsis","doi":"10.1109/CPE-POWERENG58103.2023.10227462","DOIUrl":null,"url":null,"abstract":"The fast-switching behavior of Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) has made these devices an ideal technology for high-frequency converters. However, parasitic circuit layout and other stray inductances in combination with the high di/dt and the device output capacitance cause excessive voltage overshoot across the MOSFETs. This paper presents a three-level voltage source gate driver suitable for minimizing the voltage overshoot in SiC MOSFETs operating in synchronous rectification mode. The operating principle of the driver relies on the trajectory of the gate-source voltage of the SiC MOSFET, which is adjusted in order to operate the device in active region. The driver’s performance has been experimentally validated on a synchronous DC/DC flyback converter rated at 70V and 500W. From the experiments, it is observed that using the proposed gate driver, the overvoltage across the SiC MOSFETs is minimized by approximately 13% compared to a conventional two-level gate driver.","PeriodicalId":315989,"journal":{"name":"2023 IEEE 17th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Three-Level Voltage-Source Gate Driver for SiC MOSFETs in Synchronous Rectification Mode\",\"authors\":\"A. Giannakis, Daniel A. Philipps, A. Blinov, D. Peftitsis\",\"doi\":\"10.1109/CPE-POWERENG58103.2023.10227462\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The fast-switching behavior of Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) has made these devices an ideal technology for high-frequency converters. However, parasitic circuit layout and other stray inductances in combination with the high di/dt and the device output capacitance cause excessive voltage overshoot across the MOSFETs. This paper presents a three-level voltage source gate driver suitable for minimizing the voltage overshoot in SiC MOSFETs operating in synchronous rectification mode. The operating principle of the driver relies on the trajectory of the gate-source voltage of the SiC MOSFET, which is adjusted in order to operate the device in active region. The driver’s performance has been experimentally validated on a synchronous DC/DC flyback converter rated at 70V and 500W. From the experiments, it is observed that using the proposed gate driver, the overvoltage across the SiC MOSFETs is minimized by approximately 13% compared to a conventional two-level gate driver.\",\"PeriodicalId\":315989,\"journal\":{\"name\":\"2023 IEEE 17th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG)\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE 17th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CPE-POWERENG58103.2023.10227462\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE 17th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CPE-POWERENG58103.2023.10227462","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Three-Level Voltage-Source Gate Driver for SiC MOSFETs in Synchronous Rectification Mode
The fast-switching behavior of Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) has made these devices an ideal technology for high-frequency converters. However, parasitic circuit layout and other stray inductances in combination with the high di/dt and the device output capacitance cause excessive voltage overshoot across the MOSFETs. This paper presents a three-level voltage source gate driver suitable for minimizing the voltage overshoot in SiC MOSFETs operating in synchronous rectification mode. The operating principle of the driver relies on the trajectory of the gate-source voltage of the SiC MOSFET, which is adjusted in order to operate the device in active region. The driver’s performance has been experimentally validated on a synchronous DC/DC flyback converter rated at 70V and 500W. From the experiments, it is observed that using the proposed gate driver, the overvoltage across the SiC MOSFETs is minimized by approximately 13% compared to a conventional two-level gate driver.