{"title":"一种环型ILFD,具有正交输出,除4锁定范围为91%,除8锁定范围为40%","authors":"Najmeh Hajamini, M. Yavari","doi":"10.1109/IRANIANCEE.2013.6599742","DOIUrl":null,"url":null,"abstract":"In this paper, a low-power, wide locking range and quadrature output divide-by-4 and divide-by-8 ring-type injection-locked frequency divider (ILFD) is proposed. Two techniques are implemented in a two-stage ring ILFD to provide wide locking range and low power consumption at the same time. To widen the bandwidth, a common-gate tail configuration for injecting the signal is employed. Furthermore, the common-source node sharing topology is used to increase the operating frequency of the ILFD. This ILFD is designed in a 90 nm CMOS technology. Simulation results show that the proposed ILFD can provide the locking range of 91% for divide-by-4 and 40% for divide-by-8 at the incident power of -5 dBm and -10 dBm, respectively. It consumes about 1.57 mW at a supply voltage of 1.2 V.","PeriodicalId":383315,"journal":{"name":"2013 21st Iranian Conference on Electrical Engineering (ICEE)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A ring-type ILFD with locking range of 91% for divide-by-4 and 40% for divide-by-8 with quadrature outputs\",\"authors\":\"Najmeh Hajamini, M. Yavari\",\"doi\":\"10.1109/IRANIANCEE.2013.6599742\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a low-power, wide locking range and quadrature output divide-by-4 and divide-by-8 ring-type injection-locked frequency divider (ILFD) is proposed. Two techniques are implemented in a two-stage ring ILFD to provide wide locking range and low power consumption at the same time. To widen the bandwidth, a common-gate tail configuration for injecting the signal is employed. Furthermore, the common-source node sharing topology is used to increase the operating frequency of the ILFD. This ILFD is designed in a 90 nm CMOS technology. Simulation results show that the proposed ILFD can provide the locking range of 91% for divide-by-4 and 40% for divide-by-8 at the incident power of -5 dBm and -10 dBm, respectively. It consumes about 1.57 mW at a supply voltage of 1.2 V.\",\"PeriodicalId\":383315,\"journal\":{\"name\":\"2013 21st Iranian Conference on Electrical Engineering (ICEE)\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-05-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 21st Iranian Conference on Electrical Engineering (ICEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRANIANCEE.2013.6599742\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 21st Iranian Conference on Electrical Engineering (ICEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRANIANCEE.2013.6599742","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A ring-type ILFD with locking range of 91% for divide-by-4 and 40% for divide-by-8 with quadrature outputs
In this paper, a low-power, wide locking range and quadrature output divide-by-4 and divide-by-8 ring-type injection-locked frequency divider (ILFD) is proposed. Two techniques are implemented in a two-stage ring ILFD to provide wide locking range and low power consumption at the same time. To widen the bandwidth, a common-gate tail configuration for injecting the signal is employed. Furthermore, the common-source node sharing topology is used to increase the operating frequency of the ILFD. This ILFD is designed in a 90 nm CMOS technology. Simulation results show that the proposed ILFD can provide the locking range of 91% for divide-by-4 and 40% for divide-by-8 at the incident power of -5 dBm and -10 dBm, respectively. It consumes about 1.57 mW at a supply voltage of 1.2 V.