V. Balashov, A. G. Bakhmurov, M. V. Chistolinov, R. Smeliansky, D. Volkanov, Nikita V. Youshchenko
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A Hardware-in-the-Loop Simulation Environment for Real-Time Systems Development and Architecture Evaluation
In this paper we present a technology for integration of distributed real-time embedded systems (RTES) based on hardware-in-the loop simulation. The environment to support this technology is described. This environment also enables simulation-based evaluation of RTES architecture on early stages of RTES development.