{"title":"混合信号SOC的基于路径的测试组成","authors":"S. Ozev, A. Orailoglu","doi":"10.1109/SSMSD.2000.836464","DOIUrl":null,"url":null,"abstract":"We outline a methodology for system level test composition out of module level tests in the context of system-on-a-chip (SOC). The method can be utilized as soon as high level specifications are available providing avenues for testability insertion. The digital/analog interface is handled by a conversion from digital bits to analog signals. Experimental results show that high fault and yield coverages for most tests can be attained with no hardware alterations.","PeriodicalId":166604,"journal":{"name":"2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Path-based test composition for mixed-signal SOC's\",\"authors\":\"S. Ozev, A. Orailoglu\",\"doi\":\"10.1109/SSMSD.2000.836464\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We outline a methodology for system level test composition out of module level tests in the context of system-on-a-chip (SOC). The method can be utilized as soon as high level specifications are available providing avenues for testability insertion. The digital/analog interface is handled by a conversion from digital bits to analog signals. Experimental results show that high fault and yield coverages for most tests can be attained with no hardware alterations.\",\"PeriodicalId\":166604,\"journal\":{\"name\":\"2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)\",\"volume\":\"65 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-02-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SSMSD.2000.836464\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSMSD.2000.836464","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Path-based test composition for mixed-signal SOC's
We outline a methodology for system level test composition out of module level tests in the context of system-on-a-chip (SOC). The method can be utilized as soon as high level specifications are available providing avenues for testability insertion. The digital/analog interface is handled by a conversion from digital bits to analog signals. Experimental results show that high fault and yield coverages for most tests can be attained with no hardware alterations.