基于fpga的网络虚拟化模块化数据平面设计框架

D. Unnikrishnan, Shiting Lu, Lixin Gao, R. Tessier
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引用次数: 8

摘要

网络虚拟化已经成为一种强大的技术,可以在共享网络基础设施上部署新的服务和实验性协议。尽管最近的研究强调了现场可编程门阵列(fpga)作为高性能网络虚拟化的有吸引力的平台,但由于缺乏用户友好的编程模型,这些设备仍然无法进入大型网络研究社区。非常需要能够抽象硬件平台的复杂性,同时了解底层资源约束的编程模型。在本文中,我们提出了ReClick,一个框架来有效地设计和部署基于fpga的网络虚拟化系统的可重构数据平面。描述了一个与硬件无关的编程模型,该模型允许开发人员将重点放在虚拟数据平面语义上,而不是实现细节上。该框架公开了与流行的软件路由器开发框架Click类似的接口,并促进了设计的重用。ReClick中包含的优化策略利用虚拟数据平面配置之间的相似性,以面积有效的方式实现多个平面。数据平面显示高达1gbps的数据速率已自动编译和硬件测试在一个网络FPGA平台。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
ReClick - A Modular Dataplane Design Framework for FPGA-Based Network Virtualization
Network virtualization has emerged as a powerful technique to deploy novel services and experimental protocols over shared network infrastructures. Although recent research has highlighted field programmable gate arrays (FPGAs) as attractive platforms for high performance network virtualization, these devices remain inaccessible to the larger networking research community due to the absence of user-friendly programming models. A programming model that can abstract the intricacies of the hardware platform while being aware of the underlying resource constraints is highly desirable. In this paper, we present ReClick, a framework to efficiently design and deploy reconfigurable data planes for FPGA-based network virtualization systems. A hardware-agnostic programming model is described that allows developers to focus on the virtual data plane semantics rather than the implementation details. The framework exposes interfaces similar to the popular software router development framework, Click, and promotes design reuse. Optimization strategies are included in ReClick which use similarities between virtual data plane configurations to implement multiple planes in an area-efficient manner. Data planes exhibiting up to 1 Gbps data rate have been automatically compiled and tested in hardware in a Net FPGA platform.
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