A generic FSM interpreter for embedded systems

Finite state machines are a fundamental data processing concept especially in specifying the behavioral logic of different embedded control system components. The traditional implementation approach by coding the FSMs is tedious when there is much need for changes, every separately made change leading to a hardware component update. Also the coded FSMs require lots of expensive ROM memory. To overcome these problems we have designed an architecture that is based on interpretable FSMs. The idea is to isolate the behavior behind a separate interpreter process that communicates with the rest of the system through suitable interface processes. These interfaces take care of mapping the logical entities defined to their physical correspondents, while the behavioral logic is taken care of by the interpreted FSMs exclusively. This article presents the architecture and demonstrates the use of interpretable FSMs.