用于计算机图形和图像合成的栅格引擎

Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems Pub Date : 1994-12-05 DOI:10.1109/APCCAS.1994.514532

Chein-Liang Chen, Chia-Hsing Lin, Hwan-Rei Lee, C. Jen

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引用次数: 2

摘要

为了提高计算机图形和图像合成的性能，设计并实现了栅格引擎。RE硬件可以释放50%以上的CPU负载。此外，如果采用所提出的近似Phong方法，则RE可以减少89%的CPU操作。作为本设计的特点，在RE中提出了改进的数字差分分析仪(DDA)、2级流水线和计算cos/sup n/ /spl theta/的恒定执行时间等技术。该加速器将采用0.8 um SPDM CMOS VLSI技术实现。

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A raster engine for computer graphics and image composition

A raster engine (RE) is designed and implemented to improve the performance of computer graphics and image composition. The RE hardware can release more than 50% CPU loads. Furthermore, if the approximated Phong method which is proposed is applied, 89% CPU operations are reduced by the RE. As the features of this design, the techniques including modified digital differential analyser (DDA), 2-level pipeline, and constant execution time for calculating cos/sup n/ /spl theta/ are proposed in RE. Three operation modes, Gouraud and Phong shading algorithm and image composition are incorporated in RE. This accelerator will be implemented by 0.8 um SPDM CMOS VLSI technology.

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Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems

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