On the multiple fault diagnosis of multistage interconnection networks: the lower bound and the CMOS fault model

This paper presents new results for diagnosing (detection and location) multistage interconnection networks (MINs) in the presence of multiple faults. Initially, it is proved that the lower bound in the number of tests for multiple fault diagnosis (independent of the assumed fault model for the MIN) is 2/spl times/log/sub 2/N, where N is the number of inputs/outputs of the network. A new fault model is introduced; this fault model is applicable to interconnection networks implemented using CMOS technology. The characterization for diagnosing stuck-open faults is presented.