一个8毫安，3.8 dB NF, 40 dB增益CMOS前端GPS应用

ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514) Pub Date : 1900-01-01 DOI:10.1109/LPE.2000.155299

F. Svelto, S. Deantoni, G. Montagna, R. Castello

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引用次数: 1

摘要

一个全差分0.35 /spl mu/m CMOS LNA加混频器，专为双转换架构，GPS应用已经实现。LNA利用电感退化输入级和谐振LC负载，具有12%的频率调谐，由MOS变容管完成。混频器是吉尔伯特单元，其中NMOS和PMOS差分对并联在一起，实现输入级。在给定混频器增益和线性度的情况下，这种拓扑结构可以节省功率。前端测量性能为:40 dB增益，3.8 dB NF，-25.5 dBm IIP3, 1.3 GHz输入频率，140 MHz输出频率，2.8 V电压，8ma。

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An 8 mA, 3.8 dB NF, 40 dB gain CMOS front-end for GPS applications

A fully differential 0.35 /spl mu/m CMOS LNA plus mixer, tailored to a double conversion architecture, for GPS applications has been realized. The LNA makes use of an inductively degenerated input stage and a resonant LC load, featuring 12% frequency tuning, accomplished by an MOS varactor. The mixer is a Gilbert cell like, in which an NMOS and a PMOS differential pair, shunted together, realize the input stage. This topology allows one to save power, for given mixer gain and linearity. The front-end measured performances are: 40 dB gain, 3.8 dB NF,-25.5 dBm IIP3, 1.3 GHz input frequency, 140 MHz output frequency, with 8 mA from a 2.8 V voltage supply.

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ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514)

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