亚微米范围内选择性电镀埋入金线的电化学平面化

M. Chan, T. Lo
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引用次数: 0

摘要

开发了一种用于亚微米范围内金属互连的平面电解镀金工艺。在介电间隔片内嵌入高纵横比的金线。通过在电场中蚀刻Au和氧化TiW表面,可以在介质内选择性地形成金线。该工艺可以为硅集成电路应用提供所需的导体结构特性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Electrochemical planarization by selective electroplating for embedded gold wiring in the sub-micron range
A planar Au metallization process by electrolytic plating has been developed for metal interconnections in the submicron range. Gold wires with high aspect ratio were fabricated in an embedded structure within the dielectric spacer. By etching of Au and oxidizing the surface of TiW in the field, the gold wires can be selectively formed within the dielectric. This process can provide desired properties of conductor structures for Si LSI applications.
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