J. Dilhac, D. Zerrouk, C. Ganibal, P. Rossel, M. Bafleur
{"title":"用均匀区熔再结晶法制备高压集成电路用SOI结构","authors":"J. Dilhac, D. Zerrouk, C. Ganibal, P. Rossel, M. Bafleur","doi":"10.1109/ISPSD.1996.509484","DOIUrl":null,"url":null,"abstract":"We present new experimental results about a method for creating thick silicon films on localized buried oxide layers, by superficial melting and solidification using a bank of tungsten halogen lamps. The purpose of this technique is to obtain cost-effective \"partially SOI\" substrates for high voltage smart power applications. Chemical defect revelation has been carried out in the SOI and seeded regions. N-channel MOSFETs have also been fabricated. It appears that crystallographic and electrical quality is sufficient for device processing.","PeriodicalId":377997,"journal":{"name":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Fabrication of SOI structures by uniform zone melting recrystallization for high voltage ICs\",\"authors\":\"J. Dilhac, D. Zerrouk, C. Ganibal, P. Rossel, M. Bafleur\",\"doi\":\"10.1109/ISPSD.1996.509484\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present new experimental results about a method for creating thick silicon films on localized buried oxide layers, by superficial melting and solidification using a bank of tungsten halogen lamps. The purpose of this technique is to obtain cost-effective \\\"partially SOI\\\" substrates for high voltage smart power applications. Chemical defect revelation has been carried out in the SOI and seeded regions. N-channel MOSFETs have also been fabricated. It appears that crystallographic and electrical quality is sufficient for device processing.\",\"PeriodicalId\":377997,\"journal\":{\"name\":\"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-05-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.1996.509484\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1996.509484","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fabrication of SOI structures by uniform zone melting recrystallization for high voltage ICs
We present new experimental results about a method for creating thick silicon films on localized buried oxide layers, by superficial melting and solidification using a bank of tungsten halogen lamps. The purpose of this technique is to obtain cost-effective "partially SOI" substrates for high voltage smart power applications. Chemical defect revelation has been carried out in the SOI and seeded regions. N-channel MOSFETs have also been fabricated. It appears that crystallographic and electrical quality is sufficient for device processing.