{"title":"微控制器IO接口EMI失效机制及解决方案","authors":"A. Kamath","doi":"10.1109/INCEMIC.2015.8055842","DOIUrl":null,"url":null,"abstract":"In this paper different failure modes — in a Microcontroller IO interface — during Bulk Current Injection (BCI) and Radiated Immunity (RI) are discussed. This helps the hardware engineer to properly incorporate solutions during the design phase itself so that he can avoid redesign time and testing cost. It shown in the paper how the BCI can enter into the Device Under Test (DUT) and how this can be avoided. Similarly it is shown how Radiated Immunity failure can take place. Further in case there is a failure during existing design, a step by step procedure to trouble shoot is also discussed. Finally this paper discusses general precautions that can be taken in the PCB design stage.","PeriodicalId":183137,"journal":{"name":"2015 13th International Conference on Electromagnetic Interference and Compatibility (INCEMIC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"EMI failure mechanism in microcontroller IO interface and solutions\",\"authors\":\"A. Kamath\",\"doi\":\"10.1109/INCEMIC.2015.8055842\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper different failure modes — in a Microcontroller IO interface — during Bulk Current Injection (BCI) and Radiated Immunity (RI) are discussed. This helps the hardware engineer to properly incorporate solutions during the design phase itself so that he can avoid redesign time and testing cost. It shown in the paper how the BCI can enter into the Device Under Test (DUT) and how this can be avoided. Similarly it is shown how Radiated Immunity failure can take place. Further in case there is a failure during existing design, a step by step procedure to trouble shoot is also discussed. Finally this paper discusses general precautions that can be taken in the PCB design stage.\",\"PeriodicalId\":183137,\"journal\":{\"name\":\"2015 13th International Conference on Electromagnetic Interference and Compatibility (INCEMIC)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-07-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 13th International Conference on Electromagnetic Interference and Compatibility (INCEMIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/INCEMIC.2015.8055842\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 13th International Conference on Electromagnetic Interference and Compatibility (INCEMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INCEMIC.2015.8055842","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
EMI failure mechanism in microcontroller IO interface and solutions
In this paper different failure modes — in a Microcontroller IO interface — during Bulk Current Injection (BCI) and Radiated Immunity (RI) are discussed. This helps the hardware engineer to properly incorporate solutions during the design phase itself so that he can avoid redesign time and testing cost. It shown in the paper how the BCI can enter into the Device Under Test (DUT) and how this can be avoided. Similarly it is shown how Radiated Immunity failure can take place. Further in case there is a failure during existing design, a step by step procedure to trouble shoot is also discussed. Finally this paper discusses general precautions that can be taken in the PCB design stage.