{"title":"差分放大器输入偏置电压降低的方法","authors":"A. Baskys","doi":"10.1109/BEC.2010.5629805","DOIUrl":null,"url":null,"abstract":"The input offset voltage of the differential amplifier based on the bipolar junction transistors, which operate at high current density, is analysed in this work. An analytical approach based on the equations in the explicit form is used to determine the input offset voltage reduction means. The obtained results are tested using numerical simulation of the differential amplifier.","PeriodicalId":228594,"journal":{"name":"2010 12th Biennial Baltic Electronics Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The means of the differential amplifier input offset voltage reduction\",\"authors\":\"A. Baskys\",\"doi\":\"10.1109/BEC.2010.5629805\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The input offset voltage of the differential amplifier based on the bipolar junction transistors, which operate at high current density, is analysed in this work. An analytical approach based on the equations in the explicit form is used to determine the input offset voltage reduction means. The obtained results are tested using numerical simulation of the differential amplifier.\",\"PeriodicalId\":228594,\"journal\":{\"name\":\"2010 12th Biennial Baltic Electronics Conference\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 12th Biennial Baltic Electronics Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BEC.2010.5629805\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 12th Biennial Baltic Electronics Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BEC.2010.5629805","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The means of the differential amplifier input offset voltage reduction
The input offset voltage of the differential amplifier based on the bipolar junction transistors, which operate at high current density, is analysed in this work. An analytical approach based on the equations in the explicit form is used to determine the input offset voltage reduction means. The obtained results are tested using numerical simulation of the differential amplifier.