5-5.8 GHz全集成CMOS PA，用于WLAN应用

2014 IEEE Radio and Wireless Symposium (RWS) Pub Date : 1900-01-01 DOI:10.1109/RWS.2014.6830155

Jeng‐Han Tsai, Hong-Wun Ou-Yang

{"title":"5-5.8 GHz全集成CMOS PA，用于WLAN应用","authors":"Jeng‐Han Tsai, Hong-Wun Ou-Yang","doi":"10.1109/RWS.2014.6830155","DOIUrl":null,"url":null,"abstract":"A 5-5.8 GHz fully-integrated power amplifier is designed and fabricated in TSMC standard 0.18-μm 1P6M CMOS technology. Utilizing a two-way direct shunt combining technique with an odd mode suppression resistor, the CMOS PA achieves a measured maximum saturation output power (Psat) of 23.1 dBm at 5.2 GHz. The measured output 1-dB compression point (OP1dB) is 18.6 dBm and peak power-added efficiency (PAE) is 19.8 % at 5.2 GHz. By using broadband power matching topology, the output power of the CMOS PA is 22.6 ± 0.5 dBm from 5 to 5.8 GHz.","PeriodicalId":247495,"journal":{"name":"2014 IEEE Radio and Wireless Symposium (RWS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 5–5.8 GHz fully-integrated CMOS PA for WLAN applications\",\"authors\":\"Jeng‐Han Tsai, Hong-Wun Ou-Yang\",\"doi\":\"10.1109/RWS.2014.6830155\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 5-5.8 GHz fully-integrated power amplifier is designed and fabricated in TSMC standard 0.18-μm 1P6M CMOS technology. Utilizing a two-way direct shunt combining technique with an odd mode suppression resistor, the CMOS PA achieves a measured maximum saturation output power (Psat) of 23.1 dBm at 5.2 GHz. The measured output 1-dB compression point (OP1dB) is 18.6 dBm and peak power-added efficiency (PAE) is 19.8 % at 5.2 GHz. By using broadband power matching topology, the output power of the CMOS PA is 22.6 ± 0.5 dBm from 5 to 5.8 GHz.\",\"PeriodicalId\":247495,\"journal\":{\"name\":\"2014 IEEE Radio and Wireless Symposium (RWS)\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE Radio and Wireless Symposium (RWS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RWS.2014.6830155\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Radio and Wireless Symposium (RWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RWS.2014.6830155","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

采用台积电标准0.18 μm 1P6M CMOS工艺设计制作了5-5.8 GHz全集成功率放大器。利用双向直接分流组合技术和奇模抑制电阻，CMOS PA在5.2 GHz时实现了23.1 dBm的最大饱和输出功率(Psat)。测量的输出1 db压缩点(OP1dB)为18.6 dBm，在5.2 GHz时的峰值功率附加效率(PAE)为19.8%。采用宽带功率匹配拓扑，在5 ~ 5.8 GHz范围内输出功率为22.6±0.5 dBm。

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A 5–5.8 GHz fully-integrated CMOS PA for WLAN applications

A 5-5.8 GHz fully-integrated power amplifier is designed and fabricated in TSMC standard 0.18-μm 1P6M CMOS technology. Utilizing a two-way direct shunt combining technique with an odd mode suppression resistor, the CMOS PA achieves a measured maximum saturation output power (Psat) of 23.1 dBm at 5.2 GHz. The measured output 1-dB compression point (OP1dB) is 18.6 dBm and peak power-added efficiency (PAE) is 19.8 % at 5.2 GHz. By using broadband power matching topology, the output power of the CMOS PA is 22.6 ± 0.5 dBm from 5 to 5.8 GHz.

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2014 IEEE Radio and Wireless Symposium (RWS)

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