基于时序和逻辑滤波的耦合感知静态时序分析中的悲观情绪降低

D. Das, Kip Killpack, Chandramouli V. Kashyap, A. Jas, H. Zhou
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引用次数: 5

摘要

随着技术不断扩展到纳米级,耦合引起的延迟变化的影响是显著的。虽然已经提出了几种耦合感知静态计时器,但结果往往是悲观的,有许多假故障。我们提出了一种基于迭代定时滤波和逻辑滤波的集成方法来减少悲观情绪。我们使用了一个基于到达时间和slesles的现实耦合模型,并证明了先前研究中提出的非迭代悲观减少算法可能会给出潜在的非保守定时结果。在工业65nm微处理器的功能块上,我们的算法比不考虑逻辑约束的收敛时序滤波分析产生了11.18%的最大悲观周期时间减少。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering
With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been proposed, the results are often pessimistic with many false failures. We present an integrated iterative timing filtering and logic filtering based approach to reduce pessimism. We use a realistic coupling model based on arrival times and slews and show that non-iterative pessimism reduction algorithms proposed in previous research may give potentially non- conservative timing results. On a functional block from an industrial 65nm microprocessor, our algorithm produced a maximum pessimism reduction of 11.18% of cycle time over converged timing filtering analysis that does not consider logic constraints.
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