{"title":"通用图形处理单元动态可重构内存地址映射","authors":"Weiliang Chen, Zhaoshi Li, Leibo Liu, Shaojun Wei","doi":"10.1109/ICTA56932.2022.9963035","DOIUrl":null,"url":null,"abstract":"GPGPUs utilize multi-dimensional memory subsystems to provide the bandwidth needed by their multi-dimensional parallelism. However, an unfavorable address mapping leads to imbalanced memory request distribution across the memory resources, causing degraded performance and poor power efficiency. The optimal mapping is both application- and hardware-dependent. This paper provides a software-hardware co-design to dynamically reconfigure the address mapping according to the trace of the targeted application. First, a circuit to sample the entropy of address bits is proposed to capture the optimal address mapping. Second, a dynamic reconfiguration mechanism is designed to apply the optimal address mapping. Simulation results show up to 45% performance improvement over fixed address mappings.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Dynamically Reconfigurable Memory Address Mapping for General-Purpose Graphics Processing Unit\",\"authors\":\"Weiliang Chen, Zhaoshi Li, Leibo Liu, Shaojun Wei\",\"doi\":\"10.1109/ICTA56932.2022.9963035\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"GPGPUs utilize multi-dimensional memory subsystems to provide the bandwidth needed by their multi-dimensional parallelism. However, an unfavorable address mapping leads to imbalanced memory request distribution across the memory resources, causing degraded performance and poor power efficiency. The optimal mapping is both application- and hardware-dependent. This paper provides a software-hardware co-design to dynamically reconfigure the address mapping according to the trace of the targeted application. First, a circuit to sample the entropy of address bits is proposed to capture the optimal address mapping. Second, a dynamic reconfiguration mechanism is designed to apply the optimal address mapping. Simulation results show up to 45% performance improvement over fixed address mappings.\",\"PeriodicalId\":325602,\"journal\":{\"name\":\"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-10-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICTA56932.2022.9963035\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICTA56932.2022.9963035","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Dynamically Reconfigurable Memory Address Mapping for General-Purpose Graphics Processing Unit
GPGPUs utilize multi-dimensional memory subsystems to provide the bandwidth needed by their multi-dimensional parallelism. However, an unfavorable address mapping leads to imbalanced memory request distribution across the memory resources, causing degraded performance and poor power efficiency. The optimal mapping is both application- and hardware-dependent. This paper provides a software-hardware co-design to dynamically reconfigure the address mapping according to the trace of the targeted application. First, a circuit to sample the entropy of address bits is proposed to capture the optimal address mapping. Second, a dynamic reconfiguration mechanism is designed to apply the optimal address mapping. Simulation results show up to 45% performance improvement over fixed address mappings.