Kartik Samtani, Jobin Thomas, S. Deepu, D. S. Sumam
{"title":"助听器用自适应波束形成器的面积和功率优化ASIC实现","authors":"Kartik Samtani, Jobin Thomas, S. Deepu, D. S. Sumam","doi":"10.1109/BIOCAS.2017.8325119","DOIUrl":null,"url":null,"abstract":"Beamforming is a technique used in hearing aids to improve the intelligibility of target sound by reducing the interference from other directions. An efficient ASIC implementation of a two omnidirectional microphone array based adaptive beamforming algorithm is presented in this paper with various optimisations proposed at different stages of the hardware design. The beamform patterns and improvements in SNR values obtained from experiments conducted in a conference room environment were analysed to verify the working of the design. The architecture was implemented with 0.18 μm standard cell libraries. Cell area and power reports were analysed for different optimisations. The final area and power obtained are 0.054 mm2 and 60.54 μW respectively.","PeriodicalId":361477,"journal":{"name":"2017 IEEE Biomedical Circuits and Systems Conference (BioCAS)","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Area and power optimised ASIC implementation of adaptive beamformer for hearing aids\",\"authors\":\"Kartik Samtani, Jobin Thomas, S. Deepu, D. S. Sumam\",\"doi\":\"10.1109/BIOCAS.2017.8325119\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Beamforming is a technique used in hearing aids to improve the intelligibility of target sound by reducing the interference from other directions. An efficient ASIC implementation of a two omnidirectional microphone array based adaptive beamforming algorithm is presented in this paper with various optimisations proposed at different stages of the hardware design. The beamform patterns and improvements in SNR values obtained from experiments conducted in a conference room environment were analysed to verify the working of the design. The architecture was implemented with 0.18 μm standard cell libraries. Cell area and power reports were analysed for different optimisations. The final area and power obtained are 0.054 mm2 and 60.54 μW respectively.\",\"PeriodicalId\":361477,\"journal\":{\"name\":\"2017 IEEE Biomedical Circuits and Systems Conference (BioCAS)\",\"volume\":\"2014 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Biomedical Circuits and Systems Conference (BioCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BIOCAS.2017.8325119\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Biomedical Circuits and Systems Conference (BioCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIOCAS.2017.8325119","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Area and power optimised ASIC implementation of adaptive beamformer for hearing aids
Beamforming is a technique used in hearing aids to improve the intelligibility of target sound by reducing the interference from other directions. An efficient ASIC implementation of a two omnidirectional microphone array based adaptive beamforming algorithm is presented in this paper with various optimisations proposed at different stages of the hardware design. The beamform patterns and improvements in SNR values obtained from experiments conducted in a conference room environment were analysed to verify the working of the design. The architecture was implemented with 0.18 μm standard cell libraries. Cell area and power reports were analysed for different optimisations. The final area and power obtained are 0.054 mm2 and 60.54 μW respectively.