65纳米CMOS单控制器四输出模拟辅助数字LDO自适应时间复用控制

Yasu Lu, Feng Chen, P. Mok
{"title":"65纳米CMOS单控制器四输出模拟辅助数字LDO自适应时间复用控制","authors":"Yasu Lu, Feng Chen, P. Mok","doi":"10.1109/ESSCIRC.2019.8902511","DOIUrl":null,"url":null,"abstract":"This paper presents a single-controller-four-output analog-assisted digital LDO which can regulate four output voltage domains by sharing only one digital controller with an adaptive-time-multiplexing control scheme. The area of the digital controller is 62% smaller compared to the sum of the digital controller area of four independent LDOs. An analog-assisted loop and a push-pull auxiliary loop are used to take over the control in steady state to save quiescent power, reduce output ripple and enhance the response speed. A prototype is fabricated in a 65nm CMOS process. An undershoot voltage of 100mV is measured with a 47mA/20ns load step, resulting a figure-of-merit as low as 0.12ps.","PeriodicalId":402948,"journal":{"name":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A Single-Controller-Four-Output Analog-Assisted Digital LDO with Adaptive-Time-Multiplexing Control in 65-nm CMOS\",\"authors\":\"Yasu Lu, Feng Chen, P. Mok\",\"doi\":\"10.1109/ESSCIRC.2019.8902511\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a single-controller-four-output analog-assisted digital LDO which can regulate four output voltage domains by sharing only one digital controller with an adaptive-time-multiplexing control scheme. The area of the digital controller is 62% smaller compared to the sum of the digital controller area of four independent LDOs. An analog-assisted loop and a push-pull auxiliary loop are used to take over the control in steady state to save quiescent power, reduce output ripple and enhance the response speed. A prototype is fabricated in a 65nm CMOS process. An undershoot voltage of 100mV is measured with a 47mA/20ns load step, resulting a figure-of-merit as low as 0.12ps.\",\"PeriodicalId\":402948,\"journal\":{\"name\":\"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2019.8902511\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2019.8902511","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

摘要

本文提出了一种单控制器-四输出模拟辅助数字LDO,它采用自适应时间复用控制方案,通过共用一个数字控制器来调节四个输出电压域。数字控制器的面积比四个独立ldo的数字控制器面积之和小62%。采用模拟辅助回路和推挽辅助回路接管稳态控制,节省静态功率,减小输出纹波,提高响应速度。在65纳米CMOS工艺中制造了原型。用47mA/20ns负载步进测量100mV的欠冲电压,得到低至0.12ps的性能值。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Single-Controller-Four-Output Analog-Assisted Digital LDO with Adaptive-Time-Multiplexing Control in 65-nm CMOS
This paper presents a single-controller-four-output analog-assisted digital LDO which can regulate four output voltage domains by sharing only one digital controller with an adaptive-time-multiplexing control scheme. The area of the digital controller is 62% smaller compared to the sum of the digital controller area of four independent LDOs. An analog-assisted loop and a push-pull auxiliary loop are used to take over the control in steady state to save quiescent power, reduce output ripple and enhance the response speed. A prototype is fabricated in a 65nm CMOS process. An undershoot voltage of 100mV is measured with a 47mA/20ns load step, resulting a figure-of-merit as low as 0.12ps.
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