S. Sugitani, Y. Yamane, T. Nittono, H. Yamazaki, K. Nishimura, K. Yamasaki
{"title":"用于模数混合型集成电路的自对准InGaP/InGaAs/GaAs异质结构MESFET技术","authors":"S. Sugitani, Y. Yamane, T. Nittono, H. Yamazaki, K. Nishimura, K. Yamasaki","doi":"10.1109/GAAS.1994.636945","DOIUrl":null,"url":null,"abstract":"This paper describes a new pseudomorphic InGaP/InGaAs/GaAs heterostructure MESFET (HMESFET) technology combined with a refractory self-aligned gate process for ultra-high-speed analog-digital hybrid type ICs. InGaAs is used as the thin channel layer for its higher carrier concentration. An undoped InGaP thin layer is used to improve breakdown voltage. A planar device process has been successfully developed by using self-aligned n/sup +/-implantation technology with refractory gate metal and oxygen ion implantation for device isolation. Symmetric and asymmetric FETs can be produced with the same technology by only changing the implantation angle.","PeriodicalId":328819,"journal":{"name":"Proceedings of 1994 IEEE GaAs IC Symposium","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Self-aligned InGaP/InGaAs/GaAs heterostructure MESFET technology for analog-digital hybrid type ICs\",\"authors\":\"S. Sugitani, Y. Yamane, T. Nittono, H. Yamazaki, K. Nishimura, K. Yamasaki\",\"doi\":\"10.1109/GAAS.1994.636945\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a new pseudomorphic InGaP/InGaAs/GaAs heterostructure MESFET (HMESFET) technology combined with a refractory self-aligned gate process for ultra-high-speed analog-digital hybrid type ICs. InGaAs is used as the thin channel layer for its higher carrier concentration. An undoped InGaP thin layer is used to improve breakdown voltage. A planar device process has been successfully developed by using self-aligned n/sup +/-implantation technology with refractory gate metal and oxygen ion implantation for device isolation. Symmetric and asymmetric FETs can be produced with the same technology by only changing the implantation angle.\",\"PeriodicalId\":328819,\"journal\":{\"name\":\"Proceedings of 1994 IEEE GaAs IC Symposium\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1994 IEEE GaAs IC Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GAAS.1994.636945\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE GaAs IC Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.1994.636945","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Self-aligned InGaP/InGaAs/GaAs heterostructure MESFET technology for analog-digital hybrid type ICs
This paper describes a new pseudomorphic InGaP/InGaAs/GaAs heterostructure MESFET (HMESFET) technology combined with a refractory self-aligned gate process for ultra-high-speed analog-digital hybrid type ICs. InGaAs is used as the thin channel layer for its higher carrier concentration. An undoped InGaP thin layer is used to improve breakdown voltage. A planar device process has been successfully developed by using self-aligned n/sup +/-implantation technology with refractory gate metal and oxygen ion implantation for device isolation. Symmetric and asymmetric FETs can be produced with the same technology by only changing the implantation angle.