{"title":"用于高性能控制应用的多微系统","authors":"S. Battilotti, G. Ulivi","doi":"10.1109/IECON.1989.69659","DOIUrl":null,"url":null,"abstract":"A computing architecture based on digital signal processors (DSPs) is presented for high-performance control applications. This computing system efficiently handles heavy computational loads, which typically arise when controlled plants have fast and nonlinear dynamics. The system is designed on the structure of a hierarchical controller and it consists of a decision level consisting of a general-purpose HOST computer and an actuator level (DSPs) directly connected to the plant. The synchronization and the real-time communications between the HOST and a DSP are implemented by two memory banks alternatively connected to the HOST and the DSP. A complete transparency and a minimum overhead result for the tasks running on the DSP. The system has been tested in a highly demanding robotics application.<<ETX>>","PeriodicalId":384081,"journal":{"name":"15th Annual Conference of IEEE Industrial Electronics Society","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A multimicro system for high performance control applications\",\"authors\":\"S. Battilotti, G. Ulivi\",\"doi\":\"10.1109/IECON.1989.69659\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A computing architecture based on digital signal processors (DSPs) is presented for high-performance control applications. This computing system efficiently handles heavy computational loads, which typically arise when controlled plants have fast and nonlinear dynamics. The system is designed on the structure of a hierarchical controller and it consists of a decision level consisting of a general-purpose HOST computer and an actuator level (DSPs) directly connected to the plant. The synchronization and the real-time communications between the HOST and a DSP are implemented by two memory banks alternatively connected to the HOST and the DSP. A complete transparency and a minimum overhead result for the tasks running on the DSP. The system has been tested in a highly demanding robotics application.<<ETX>>\",\"PeriodicalId\":384081,\"journal\":{\"name\":\"15th Annual Conference of IEEE Industrial Electronics Society\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-11-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"15th Annual Conference of IEEE Industrial Electronics Society\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IECON.1989.69659\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"15th Annual Conference of IEEE Industrial Electronics Society","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IECON.1989.69659","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A multimicro system for high performance control applications
A computing architecture based on digital signal processors (DSPs) is presented for high-performance control applications. This computing system efficiently handles heavy computational loads, which typically arise when controlled plants have fast and nonlinear dynamics. The system is designed on the structure of a hierarchical controller and it consists of a decision level consisting of a general-purpose HOST computer and an actuator level (DSPs) directly connected to the plant. The synchronization and the real-time communications between the HOST and a DSP are implemented by two memory banks alternatively connected to the HOST and the DSP. A complete transparency and a minimum overhead result for the tasks running on the DSP. The system has been tested in a highly demanding robotics application.<>