A Simplified Model for Species Transport in Very Large Scale Microfluidic Networks

A novel modeling technique for fluid flow and species transport in very large scale microfluidic networks is developed with applications to massively parallelized microreactors. Very large scale integration (VLSI) of microfluidic circuits presents an attractive solution for many biological testing applications such as gene expression, DNA sequencing and drug screening, which require massive parallelization of reactions to increase throughput and decrease time-to-result. However, the design and modeling of VLSI microfluidics remains challenging with conventional 2D or 3D computational fluid dynamic (CFD) techniques due to the large computational resources required. Using simplified models is crucial to reduce simulation time on existing computational resources. Many microfluidic networks can be solved using resistance based networks similar to electrical circuits; however, simplified models for species transport (diffusion plus advection) in microfluidic networks has received much less attention. Here, we introduce a simplified model based on resistance network based modeling for flow dynamics and couple it with a one-dimensional discretization of the advection-diffusion transport equation. The developed model was validated against CFD simulations using ANSYS Fluent for a flow network consisting of a 4 by 4 array of microreactors. It showed good agreement with 2D CFD simulations with less than 6% error in total pressure drop across the network for channels with a length to width ratio of 10. The error was only 3% for a channel length to width ratio of 20. The developed model was then used to optimize the design of a 100-microreactors network used for high purity cyclical loading of reagents. The reactor configuration with a minimum cycle time for reagent loading and unloading and minimum operating pressure were evaluated with the code. In theory, the simulation can be scaled to much larger reactor arrays after further optimizations of the code and utilizing parallel processing.