{"title":"高压介质隔离可控硅集成电路工艺","authors":"J. D. Beasom","doi":"10.1109/IEDM.1977.189198","DOIUrl":null,"url":null,"abstract":"High voltage integrated circuit SCR's are required for applications such as cross point switching in telephone networks. This paper describes a process which produces these components in integrated form using dielectric isolation to eliminate substrate current, isolation leakage and latch-up and to achieve improved packing density. Significant characteristics of the devices produced are: breakover voltage > 250V; VF< 1.6v at anode current density = 100ma/mil2; anode current >1mA per mil2of chip area; ron< 10 ohms; gate turn off by cathode gate. Analysis and experimental results of two effects unique to dielectric isolation will be presented. One is confinement of minority carriers in a limited volume by the impenetrable oxide isolation. The other is the effect on breakdown voltage bf spreading a depletion layer through a lightly doped region and against oxide isolation and the variation of this voltage with bias on the poly silicon substrate.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"High voltage dielectric isolation SCR integrated circuit process\",\"authors\":\"J. D. Beasom\",\"doi\":\"10.1109/IEDM.1977.189198\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High voltage integrated circuit SCR's are required for applications such as cross point switching in telephone networks. This paper describes a process which produces these components in integrated form using dielectric isolation to eliminate substrate current, isolation leakage and latch-up and to achieve improved packing density. Significant characteristics of the devices produced are: breakover voltage > 250V; VF< 1.6v at anode current density = 100ma/mil2; anode current >1mA per mil2of chip area; ron< 10 ohms; gate turn off by cathode gate. Analysis and experimental results of two effects unique to dielectric isolation will be presented. One is confinement of minority carriers in a limited volume by the impenetrable oxide isolation. The other is the effect on breakdown voltage bf spreading a depletion layer through a lightly doped region and against oxide isolation and the variation of this voltage with bias on the poly silicon substrate.\",\"PeriodicalId\":218912,\"journal\":{\"name\":\"1977 International Electron Devices Meeting\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1977 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.1977.189198\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1977 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1977.189198","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High voltage dielectric isolation SCR integrated circuit process
High voltage integrated circuit SCR's are required for applications such as cross point switching in telephone networks. This paper describes a process which produces these components in integrated form using dielectric isolation to eliminate substrate current, isolation leakage and latch-up and to achieve improved packing density. Significant characteristics of the devices produced are: breakover voltage > 250V; VF< 1.6v at anode current density = 100ma/mil2; anode current >1mA per mil2of chip area; ron< 10 ohms; gate turn off by cathode gate. Analysis and experimental results of two effects unique to dielectric isolation will be presented. One is confinement of minority carriers in a limited volume by the impenetrable oxide isolation. The other is the effect on breakdown voltage bf spreading a depletion layer through a lightly doped region and against oxide isolation and the variation of this voltage with bias on the poly silicon substrate.