RC-NVM:为内存数据库启用对称行和列内存访问

Peng Wang, Shuo Li, Guangyu Sun, Xiaoyang Wang, Yiran Chen, Hai Helen Li, J. Cong, Nong Xiao, Zhang Tao
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引用次数: 16

摘要

不断增加的DRAM容量促进了内存数据库(IMDB)的发展。imdb提供的巨大性能改进支持在同一数据库上进行事务处理和分析。换句话说,联机事务处理(OLTP)和联机分析处理(OLAP)系统的集成正在成为一个大趋势。然而,传统的基于dram的主存针对基于行数据库中的OLTP工作负载生成的面向行访问进行了优化。对指定列进行扫描的OLAP查询会导致所谓的跨行访问,并导致较差的内存性能。由于内存访问延迟在IMDB处理时间中占主导地位,因此它会显著降低整体性能。为了克服这个问题,我们提出了一种基于非易失性存储器的双寻址存储器体系结构,称为RC-NVM,以支持面向行和面向列的访问。我们首先提出电路级分析,以证明这种双寻址架构仅适用于RC-NVM而不是DRAM技术。然后,我们从架构层面重新思考RC-NVM的寻址方案、数据布局、缓存同义词和一致性问题,使其适用于imdb。最后,我们提出了一种将IMDB知识与内存架构相结合的组缓存技术,以进一步优化系统。实验结果表明,在仅占用15%的区域开销的情况下,存储器访问性能可提高14.5倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
RC-NVM: Enabling Symmetric Row and Column Memory Accesses for In-memory Databases
Ever increasing DRAM capacity has fostered the development of in-memory databases (IMDB). The massive performance improvements provided by IMDBs have enabled transactions and analytics on the same database. In other words, the integration of OLTP (on-line transactional processing) and OLAP (on-line analytical processing) systems is becoming a general trend. However, conventional DRAM-based main memory is optimized for row-oriented accesses generated by OLTP workloads in row-based databases. OLAP queries scanning on specified columns cause so-called strided accesses and result in poor memory performance. Since memory access latency dominates in IMDB processing time, it can degrade overall performance significantly. To overcome this problem, we propose a dual-addressable memory architecture based on non-volatile memory, called RC-NVM, to support both row-oriented and column-oriented accesses. We first present circuit-level analysis to prove that such a dual-addressable architecture is only practical with RC-NVM rather than DRAM technology. Then, we rethink the addressing schemes, data layouts, cache synonym, and coherence issues of RC-NVM in architectural level to make it applicable for IMDBs. Finally, we propose a group caching technique that combines the IMDB knowledge with the memory architecture to further optimize the system. Experimental results show that the memory access performance can be improved up to 14.5X with only 15% area overhead.
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