{"title":"改进了共享内存多处理器上的并行架构模拟","authors":"P. Konas, P. Yew","doi":"10.1145/182478.182584","DOIUrl":null,"url":null,"abstract":"In recent years, advances in technology and in the area of computer architecture have resulted in increasingly more complex designs. As the complexity of the designs increases, simulation becomes the only viable method for gaining insight into the operation of new as well as existing computer systems. One way to meet the excessive processing requirements of detailed computer systems simulations is to execute them on a multiprocessor machine. Computer systems simulations are inherently synchronous and contain significant amounts of inherent parallelism [8]. Hence, the main problem in such simulations is to exploit the available parelelism with the least possible overhead. Unfortunately, both conservative and optimistic asynchronous methods are not appropriate for such simulations because they introduce significant overheads in their attempt to find parallelism [8]. Therefore, we focus our attention on synchronous parallel simulation methods. In this paper we present a synchronous, parallel, event-driven approach (SPSDES). It differs from previous approaches in many ways: (1) it contains a single, global synchronization operation per simulation phase; (2) it introduces a minimum number of kernel operations into the simulation; (3) it allows for efficient processor self-scheduling; and (4) it aggressively exposes parallelism only when a simulation phase does not contain enough parallelism for the processors to exploit. We study the performance of SPaDES by simulating a symmetric multiprocessor (tat-get machine) on a NUMA multiprocessor (hosl machine). The NUMA characteristics of the host machine enable us to study the performance of the method under demanding run-time conditions and to assess the impact of partitioning and scheduling on the efficiency of the parallel simulator. The few kernel operations introduced by SPaDES, the use of a single barrier during each phase, and the exploitation of coarse-grain parallelism are the main reasons SPaDES achieves high performance. Our main concern in this paper is the performance of the proposed method in the simulation of synchronous architectural designs. In Section 2 we present the SPaDES simulation method, and in Section 3 we study its performance, Section 4 contains our conclusions and future research directions.","PeriodicalId":194781,"journal":{"name":"Workshop on Parallel and Distributed Simulation","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Improved parallel architectural simulations on shared-memory multiprocessors\",\"authors\":\"P. Konas, P. Yew\",\"doi\":\"10.1145/182478.182584\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In recent years, advances in technology and in the area of computer architecture have resulted in increasingly more complex designs. As the complexity of the designs increases, simulation becomes the only viable method for gaining insight into the operation of new as well as existing computer systems. One way to meet the excessive processing requirements of detailed computer systems simulations is to execute them on a multiprocessor machine. Computer systems simulations are inherently synchronous and contain significant amounts of inherent parallelism [8]. Hence, the main problem in such simulations is to exploit the available parelelism with the least possible overhead. Unfortunately, both conservative and optimistic asynchronous methods are not appropriate for such simulations because they introduce significant overheads in their attempt to find parallelism [8]. Therefore, we focus our attention on synchronous parallel simulation methods. In this paper we present a synchronous, parallel, event-driven approach (SPSDES). It differs from previous approaches in many ways: (1) it contains a single, global synchronization operation per simulation phase; (2) it introduces a minimum number of kernel operations into the simulation; (3) it allows for efficient processor self-scheduling; and (4) it aggressively exposes parallelism only when a simulation phase does not contain enough parallelism for the processors to exploit. We study the performance of SPaDES by simulating a symmetric multiprocessor (tat-get machine) on a NUMA multiprocessor (hosl machine). The NUMA characteristics of the host machine enable us to study the performance of the method under demanding run-time conditions and to assess the impact of partitioning and scheduling on the efficiency of the parallel simulator. The few kernel operations introduced by SPaDES, the use of a single barrier during each phase, and the exploitation of coarse-grain parallelism are the main reasons SPaDES achieves high performance. Our main concern in this paper is the performance of the proposed method in the simulation of synchronous architectural designs. In Section 2 we present the SPaDES simulation method, and in Section 3 we study its performance, Section 4 contains our conclusions and future research directions.\",\"PeriodicalId\":194781,\"journal\":{\"name\":\"Workshop on Parallel and Distributed Simulation\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Workshop on Parallel and Distributed Simulation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/182478.182584\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Workshop on Parallel and Distributed Simulation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/182478.182584","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Improved parallel architectural simulations on shared-memory multiprocessors
In recent years, advances in technology and in the area of computer architecture have resulted in increasingly more complex designs. As the complexity of the designs increases, simulation becomes the only viable method for gaining insight into the operation of new as well as existing computer systems. One way to meet the excessive processing requirements of detailed computer systems simulations is to execute them on a multiprocessor machine. Computer systems simulations are inherently synchronous and contain significant amounts of inherent parallelism [8]. Hence, the main problem in such simulations is to exploit the available parelelism with the least possible overhead. Unfortunately, both conservative and optimistic asynchronous methods are not appropriate for such simulations because they introduce significant overheads in their attempt to find parallelism [8]. Therefore, we focus our attention on synchronous parallel simulation methods. In this paper we present a synchronous, parallel, event-driven approach (SPSDES). It differs from previous approaches in many ways: (1) it contains a single, global synchronization operation per simulation phase; (2) it introduces a minimum number of kernel operations into the simulation; (3) it allows for efficient processor self-scheduling; and (4) it aggressively exposes parallelism only when a simulation phase does not contain enough parallelism for the processors to exploit. We study the performance of SPaDES by simulating a symmetric multiprocessor (tat-get machine) on a NUMA multiprocessor (hosl machine). The NUMA characteristics of the host machine enable us to study the performance of the method under demanding run-time conditions and to assess the impact of partitioning and scheduling on the efficiency of the parallel simulator. The few kernel operations introduced by SPaDES, the use of a single barrier during each phase, and the exploitation of coarse-grain parallelism are the main reasons SPaDES achieves high performance. Our main concern in this paper is the performance of the proposed method in the simulation of synchronous architectural designs. In Section 2 we present the SPaDES simulation method, and in Section 3 we study its performance, Section 4 contains our conclusions and future research directions.