具有路由lsi和通用dsp的可重构处理器阵列

[1992] Proceedings of the International Conference on Application Specific Array Processors Pub Date : 1992-08-04 DOI:10.1109/ASAP.1992.218578

J. Levison, I. Kuroda, T. Nishitani

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引用次数: 7

摘要

一个可扩展的信号处理器阵列的构建块，开发了一个通用的DSP和一个消息路由LSI。每个DSP可以通过多个路由lsi连接起来，形成一个点对点的数据包通信消息传递网络。采用直通路由技术，获得了较低的网络时延和足够的通信带宽。片上路由表的使用允许规则和不规则的拓扑结构与复杂的路由技术，如广泛/多播和动态路由。dsp (mu PD77240)，灵活的消息传递网络和可选的特定应用I/O接口的组合使处理器阵列适用于各种高速信号处理应用，如自适应阵列处理和3-D视觉处理。

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A reconfigurable processor array with routing LSIs and general purpose DSPs

A building block for a scalable signal processor array is developed with a general-purpose DSP and a message routing LSI. Each DSP can be connected by multiple routing LSIs forming a point-to-point message-passing network with data packet communication. Low network latency is obtained by cut-through routing technique with sufficient communication bandwidth. The employment of an on-chip routing table allows regular as well as irregular topologies with complex routing techniques such as broad/multi-casting and dynamic routing. The combination of DSPs ( mu PD77240), a flexible message-passing network and an optional application-specific I/O interface makes the processor array suitable for a wide range of high speed signal processing applications such as adaptive array processing and 3-D vision processing.<>

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[1992] Proceedings of the International Conference on Application Specific Array Processors

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