Plasma Activated Low-temperature Die-level Direct Bonding with Advanced Wafer Dicing Technologies for 3D Heterogeneous Integration

In this paper, we have demonstrated a plasma activated low-temperature die-level oxide-oxide direct bonding with advanced wafer dicing technologies. This evaluation used blanket 300-mm silicon wafers. $1\ \mu\mathrm{m}$ Tetraethyl orthosilicate (TEOS) oxide was deposited by plasma-enhanced chemical vapor deposition (PECVD) directly on the silicon (Si) wafer surface, followed by chemical mechanical planarization (CMP). Atomic Force Microscopy (AFM) was used to examine the roughness of the wafer surface before dicing and it showed < 0.38 nm RMS and < 0.30 nm $\mathrm{R}_{\mathrm{a}}$. Several dicing technologies such as diamond blade dicing, step-cut blade dicing, bevel blade dicing, and stealth laser dicing were evaluated for this integration scheme. In the end, diamond blade dicing has the most compatibility with many materials, but it led to large chipping on the edges of the die. Stealth laser dicing achieves edge chipping of less than $2\ \mu\mathrm{m}$, which is the least amount of damage among of all dicing methods tested in this study. In the bonding test, the 10 mm square silicon die was bonded to a 35-mm square silicon substrate. Both silicon die and substrate are of thickness $760\ \mu\mathrm{m}$. Prior to direct oxide-oxide bonding, both silicon die, and substrate went through a two-step cleaning process. The detailed process of the plasma activated die-level direct bonding is discussed.