工艺变化和器件失配对模拟/射频电路设计的影响及建模

Yuhua Cheng
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引用次数: 37

摘要

评述了局部工艺变化和器件失配对电阻器、电容器和mosfet的电特性的影响。本文主要讨论了器件失配在利用现代CMOS技术进行模拟设计中越来越重要的问题。本文还讨论了描述不匹配行为的模型。为了减少设计周期/成本并帮助提高电路的良率,需要采用物理和精确的统计建模方法来正确预测电路的行为,同时考虑到局部工艺变化和器件不匹配。该模型考虑了自变量与模型参数之间的物理相关性,可以较好地预测宽几何器件在不同偏置条件下的测量数据。为了使模型具有预测性,除了众所周知的物理效应(如短宽度和窄宽度效应)外,还应考虑新的物理效应(如多极耗尽和沟道量化)对工艺变化和失配的影响,以正确描述器件/电路的行为。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The influence and modeling of process variation and device mismatch for analog/rf circuit design
The influence of local process variation and device mismatch to the electrical characteristics of resistors, capacitors, and MOSFETs is reviewed. The discussion is mainly focus on the device mismatch as it becomes more and more important in analog design utilizing modern CMOS technology. The models to describe the mismatch behavior are also discussed. To reduce the design circle/cost and help improving the circuit yields, physical and accurate statistical modeling approach is needed to predict correctly the circuit behavior with the consideration of local process variation and device mismatch. With including the physical correlations between the independent variable and model parameters such models can predict the measured data well at different bias conditions for devices with wide geometries. For the model to be predictive, besides the well known physical effects such as short and narrow width effects, the influence of new physics effects such as poly-gate depletion and channel quantization to process variation and mismatch should be accounted for to describe the device/circuit behaviors correctly.
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