I/O单元的自动布局生成器

Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) Pub Date : 2005-07-20 DOI:10.1109/IWSOC.2005.39

Li-Chun Tien, Jing-Jou Tang, Mi-Chang Chang

{"title":"I/O单元的自动布局生成器","authors":"Li-Chun Tien, Jing-Jou Tang, Mi-Chang Chang","doi":"10.1109/IWSOC.2005.39","DOIUrl":null,"url":null,"abstract":"We present a design methodology for I/O cell library design automation. It's different from the conventional cell library compilers or generators, which generate the cells for standard cells or regular structures (e.g., SRAM). The proposed compiler generates I/O cells based on a set of parameterized unit-cells with the features of scalable geometry dependence. The compilation results of the I/O cells have been proved in a 0.13 /spl mu/m LOGIC IP8M process. Through this compiler, the number of unit-cells needed to be maintained is dramatically reduced, thereby reducing library development costs and time to market.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"An automatic layout generator for I/O cells\",\"authors\":\"Li-Chun Tien, Jing-Jou Tang, Mi-Chang Chang\",\"doi\":\"10.1109/IWSOC.2005.39\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a design methodology for I/O cell library design automation. It's different from the conventional cell library compilers or generators, which generate the cells for standard cells or regular structures (e.g., SRAM). The proposed compiler generates I/O cells based on a set of parameterized unit-cells with the features of scalable geometry dependence. The compilation results of the I/O cells have been proved in a 0.13 /spl mu/m LOGIC IP8M process. Through this compiler, the number of unit-cells needed to be maintained is dramatically reduced, thereby reducing library development costs and time to market.\",\"PeriodicalId\":328550,\"journal\":{\"name\":\"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-07-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWSOC.2005.39\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2005.39","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

我们提出了一种I/O单元库设计自动化的设计方法。它与传统的单元库编译器或生成器不同，后者为标准单元或规则结构(例如SRAM)生成单元。该编译器基于一组具有可伸缩几何依赖性的参数化单元生成I/O单元。I/O单元的编译结果在0.13 /spl mu/m的逻辑IP8M进程中得到了验证。通过这个编译器，需要维护的单元格数量大大减少，从而减少了库开发成本和上市时间。

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An automatic layout generator for I/O cells

We present a design methodology for I/O cell library design automation. It's different from the conventional cell library compilers or generators, which generate the cells for standard cells or regular structures (e.g., SRAM). The proposed compiler generates I/O cells based on a set of parameterized unit-cells with the features of scalable geometry dependence. The compilation results of the I/O cells have been proved in a 0.13 /spl mu/m LOGIC IP8M process. Through this compiler, the number of unit-cells needed to be maintained is dramatically reduced, thereby reducing library development costs and time to market.

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Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)

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