基于三维动态忆阻阵列的高面积效率三维油藏计算(5.12 TOPS/mm2

Wenxuan Sun, Woyu Zhang, Jie Yu, Yi Li, Zeyu Guo, Jinru Lai, Danian Dong, Xu Zheng, Fei Wang, Shaoyang Fan, Xiaoxin Xu, Dashan Shang, Meilin Liu
{"title":"基于三维动态忆阻阵列的高面积效率三维油藏计算(5.12 TOPS/mm2","authors":"Wenxuan Sun, Woyu Zhang, Jie Yu, Yi Li, Zeyu Guo, Jinru Lai, Danian Dong, Xu Zheng, Fei Wang, Shaoyang Fan, Xiaoxin Xu, Dashan Shang, Meilin Liu","doi":"10.1109/vlsitechnologyandcir46769.2022.9830310","DOIUrl":null,"url":null,"abstract":"In this work, we realized a three-dimensional (3D) reservoir computing (RC) by utilizing the I-V nonlinearity and short-term memory of the dynamic memristor in 4-layer vertical array. The cycle-to-cycle variation of the dynamic reservoir is improved by parallel memristor configuration. The dimensionality of the reservoir space is increased by input strategy design. After the hardware-software co-optimization, the proposed 3D RC system exhibits high recognition accuracy (90%), low energy consumption (~0.78 pJ /operation), and high area efficiency (5.12 TOPS/mm2).","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"3D Reservoir Computing with High Area Efficiency (5.12 TOPS/mm2) Implemented by 3D Dynamic Memristor Array for Temporal Signal Processing\",\"authors\":\"Wenxuan Sun, Woyu Zhang, Jie Yu, Yi Li, Zeyu Guo, Jinru Lai, Danian Dong, Xu Zheng, Fei Wang, Shaoyang Fan, Xiaoxin Xu, Dashan Shang, Meilin Liu\",\"doi\":\"10.1109/vlsitechnologyandcir46769.2022.9830310\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, we realized a three-dimensional (3D) reservoir computing (RC) by utilizing the I-V nonlinearity and short-term memory of the dynamic memristor in 4-layer vertical array. The cycle-to-cycle variation of the dynamic reservoir is improved by parallel memristor configuration. The dimensionality of the reservoir space is increased by input strategy design. After the hardware-software co-optimization, the proposed 3D RC system exhibits high recognition accuracy (90%), low energy consumption (~0.78 pJ /operation), and high area efficiency (5.12 TOPS/mm2).\",\"PeriodicalId\":332454,\"journal\":{\"name\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830310\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830310","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

在这项工作中,我们利用动态忆阻器的I-V非线性和短期记忆在4层垂直阵列中实现了三维储层计算。并联忆阻器结构改善了动态储层的周期变化。通过输入策略设计,提高了储层空间的维数。经软硬件协同优化后,三维RC系统具有较高的识别精度(90%)、低能耗(~0.78 pJ /运算)和高面积效率(5.12 TOPS/mm2)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
3D Reservoir Computing with High Area Efficiency (5.12 TOPS/mm2) Implemented by 3D Dynamic Memristor Array for Temporal Signal Processing
In this work, we realized a three-dimensional (3D) reservoir computing (RC) by utilizing the I-V nonlinearity and short-term memory of the dynamic memristor in 4-layer vertical array. The cycle-to-cycle variation of the dynamic reservoir is improved by parallel memristor configuration. The dimensionality of the reservoir space is increased by input strategy design. After the hardware-software co-optimization, the proposed 3D RC system exhibits high recognition accuracy (90%), low energy consumption (~0.78 pJ /operation), and high area efficiency (5.12 TOPS/mm2).
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信