Yifan Hu, Tao Huang, Run Run, Li Yin, Guolin Li, Xiang Xie
{"title":"PPBAM:一种基于预处理的CNN节能近似乘法器设计","authors":"Yifan Hu, Tao Huang, Run Run, Li Yin, Guolin Li, Xiang Xie","doi":"10.1109/ICTA56932.2022.9963130","DOIUrl":null,"url":null,"abstract":"In the fields of CNN, there exists many multiply applications with one fixed operand. In view of such characteristics, this paper proposes a preprocessing-based power-efficient approximate multiplier (PPBAM) design for CNN. In the proposed design, the fixed operand is preprocessed to avoid additional dynamic power consumption due to repeated processing. To reduce the number of the partial products, the first ‘1’ of both two operands are found and then the operands are truncated by a method named weak rounding. What's more, a sub multiplier array utilizing an approximate 4:2 compressor are proposed to calculate the truncation results with low power. The experimental results show that, with the same accuracy, on average, our design has a 30% improvement in power consumption compared with state-of-the-art approximate multiplier designs without additional latency and area.","PeriodicalId":325602,"journal":{"name":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"PPBAM:A Preprocessing-based Power-Efficient Approximate Multiplier Design for CNN\",\"authors\":\"Yifan Hu, Tao Huang, Run Run, Li Yin, Guolin Li, Xiang Xie\",\"doi\":\"10.1109/ICTA56932.2022.9963130\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the fields of CNN, there exists many multiply applications with one fixed operand. In view of such characteristics, this paper proposes a preprocessing-based power-efficient approximate multiplier (PPBAM) design for CNN. In the proposed design, the fixed operand is preprocessed to avoid additional dynamic power consumption due to repeated processing. To reduce the number of the partial products, the first ‘1’ of both two operands are found and then the operands are truncated by a method named weak rounding. What's more, a sub multiplier array utilizing an approximate 4:2 compressor are proposed to calculate the truncation results with low power. The experimental results show that, with the same accuracy, on average, our design has a 30% improvement in power consumption compared with state-of-the-art approximate multiplier designs without additional latency and area.\",\"PeriodicalId\":325602,\"journal\":{\"name\":\"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-10-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICTA56932.2022.9963130\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICTA56932.2022.9963130","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
PPBAM:A Preprocessing-based Power-Efficient Approximate Multiplier Design for CNN
In the fields of CNN, there exists many multiply applications with one fixed operand. In view of such characteristics, this paper proposes a preprocessing-based power-efficient approximate multiplier (PPBAM) design for CNN. In the proposed design, the fixed operand is preprocessed to avoid additional dynamic power consumption due to repeated processing. To reduce the number of the partial products, the first ‘1’ of both two operands are found and then the operands are truncated by a method named weak rounding. What's more, a sub multiplier array utilizing an approximate 4:2 compressor are proposed to calculate the truncation results with low power. The experimental results show that, with the same accuracy, on average, our design has a 30% improvement in power consumption compared with state-of-the-art approximate multiplier designs without additional latency and area.