纳米时代可制造性与可靠性设计

Goutam Debnath, P. J. Thadikaran
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引用次数: 4

摘要

任何公司的底线都是从任何给定的产品中获得最大的利润。有许多因素影响产品设计,从而导致盈利的业务。最大的因素之一是产品的可制造性。满足6+6(6个月用于开发,6个月用于确认产品交付给客户)产品生命周期以适应快速变化的技术需求变得越来越重要。顺利、可靠和高效的产品生产是成功满足TTM的关键,可以获得更高比例的总可用市场(TAM)。本教程将解决当今工业在亚微米技术中设计制造友好的高度复杂的千兆级产品时所面临的困难。随着我们进入深亚微米时代,相对于上一代制造工艺,误差范围或公差保护带越来越紧。在这一点上,在设计周期的早期关注面向制造的设计(DFM)相关问题是很重要的,而不是在设计的后期。这些包括,但不限于,设计中的各种调试挂钩,以便在给定的设计中轻松调试数十亿个晶体管,注意制造友好的物理设计规则,确保有足够的测试覆盖以切换大多数设计节点,确保在产品的生命周期内实现晶体管退化的最佳保护带,以及最后但并非最不重要的是,所有可靠性(ESD, EM/SH, LU, LU)。在带出前的预硅设计中解决了相关问题。过去,制造问题没有得到太多关注;时代变了,设计师必须比以往任何时候都更加敏感,在设计周期的早期解决与制造相关的问题。简而言之,本教程将为参与高性能VLSI设计的设计工程师(无论前端或后端)捕获必须具备的知识,因为DFM功能在设计周期中向上游移动。观众将对如何将特定的制造问题集成到产品设计中,以在最短的开发时间内获得更容易制造且整体质量优异的产品有很好的理解。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design for Manufacturability and Reliability in Nano Era
The bottom line of any company is to maximize the profit from any given product. There are many factors influencing the product design resulting in a profitable business. One of the biggest factors is the manufacturability of the product. It is becoming more and more crucial to meet the 6+6 (6 months for the development and 6 months for qualifying the product to ship to customer) product life cycle to accommodate the rapid changing technology hungry market demand. Smooth, reliable, and efficient product ramp through manufacturing is the key of success for meeting TTM, capturing higher percentage of total available market (TAM). This tutorial is going to address the difficulties industries are facing today in designing manufacturing friendly highly complex giga-scale products in submicron technology. As we are heavily into deep submicron era, the error margin or the tolerance guard band is getting tighter and tighter with respect to the previous generation of fabrication process. On this note, it is important to pay attention to Design For Manufacturing (DFM) related issues early in the design cycle as oppose to later in the design. These include, however not limited to, all kinds debugging hooks in the design for easy debugging of billion of transistors in a given design, paying attention to manufacturing friendly physical design rules, making sure of adequate test coverage to toggle most of the design nodes, making sure optimal guard band is implemented for transistor degradation for the lifetime of the product, and last but not least, all reliability (ESD, EM/SH, LU, etc) related issues are resolved in pre-silicon design before Tape out. In the past, manufacturing issues were not given much attention; time has changed and designers must have to be more sensitive than ever before in addressing manufacturing related issues early in the design cycle. In a nut shell, this tutorial will capture the must have knowledge for design engineers (irrespective of front-end or back-end) who are involved in high performance VLSI design, as DFM features moving upstream in the design cycle. Audience will walk out with a good understanding on how to integrate specific manufacturing concerns into a product’s design to obtain a product that is easier to manufacture with excellent overall quality in a shortest development time.
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