4 ps Resolution Time-to-Digital Converter Implementation Utilizing LUTs

In this work, a new approach for time-to-digital converter (TDC) was implemented and measured. The TDC is utilizing two ring oscillators, slow and fast oscillators. Ring oscillators that are used in the proposed scheme are implemented utilizing fast lookup tables. The editor floor planning was used to optimize the logic components placement and routing. The suggested TDC design was implemented and tested utilizing a Xilinx Virtex-5 field-programmable gate array. To ensure the effectiveness of the suggested design, the proposed system has been tested by both the simulation environment and the hardware measurement bench. The convergence between simulation results and measurement results reflects the accuracy and reliability of the proposed scheme. The TDC achieves a measured accuracy of 4 ps. The obtained results show the superiority of the proposed system compared to the related work.