{"title":"降低两级单相变换器中二次谐波电流的控制方案:从直流母线端口阻抗特性的概述","authors":"Li Zhang, X. Ruan","doi":"10.1109/TPEL.2019.2894647","DOIUrl":null,"url":null,"abstract":"The instantaneous input and output power of the single-phase converter are imbalanced, resulting in second harmonic current (SHC). This paper provides an insight for reducing the SHC in two-stage single-phase converter from the perspective of the dc-bus port-impedance characterization. It is found that the dc-dc converters in the two-stage single-phase converter can be categorized into two types. One is operating as a bus-voltage-controlled converter (BVCC) whose dc-bus port-impedance is approximately inverse-proportional to the voltage loop gain. The other is operating as a bus-current-controlled converter (BCCC) whose dc-bus port-impedance is a negative resistor. Based on the dc-bus port-impedance characterization, critical points for SHC reduction are summarized, indicating that, for reducing SHC in BVCC, proper control scheme needs be incorporated for increasing the dc-bus port-impedance at twice the input frequency $(2f_{\\text{in}})$ or output frequency $(2f_{\\mathrm{o}});$ concurrently, the dc bus voltage ripple should be limited for reducing the SHC in the dc source or load; by contrast, for reducing SHC in BCCC, the dc bus voltage ripple should be reduced; simultaneously, the loop gain at $2fi_{\\text{in}}$ or $2f_{\\mathrm{o}}$ should be high enough for eliminating the SHC in the dc source or load. Thereafter, proper SHC reduction approaches are recommended for different types of two-stage single-phase converters, and pros and cons of different SHC reduction schemes are carefully reviewed. Finally, potential challenges and issues related to this research topic are discussed.","PeriodicalId":415217,"journal":{"name":"2018 IEEE Energy Conversion Congress and Exposition (ECCE)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-01-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"Control Schemes for Reducing the Second Harmonic Current in Two-Stage Single-Phase Converter: An Overview from DC-Bus Port-Impedance Characterization\",\"authors\":\"Li Zhang, X. Ruan\",\"doi\":\"10.1109/TPEL.2019.2894647\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The instantaneous input and output power of the single-phase converter are imbalanced, resulting in second harmonic current (SHC). This paper provides an insight for reducing the SHC in two-stage single-phase converter from the perspective of the dc-bus port-impedance characterization. It is found that the dc-dc converters in the two-stage single-phase converter can be categorized into two types. One is operating as a bus-voltage-controlled converter (BVCC) whose dc-bus port-impedance is approximately inverse-proportional to the voltage loop gain. The other is operating as a bus-current-controlled converter (BCCC) whose dc-bus port-impedance is a negative resistor. Based on the dc-bus port-impedance characterization, critical points for SHC reduction are summarized, indicating that, for reducing SHC in BVCC, proper control scheme needs be incorporated for increasing the dc-bus port-impedance at twice the input frequency $(2f_{\\\\text{in}})$ or output frequency $(2f_{\\\\mathrm{o}});$ concurrently, the dc bus voltage ripple should be limited for reducing the SHC in the dc source or load; by contrast, for reducing SHC in BCCC, the dc bus voltage ripple should be reduced; simultaneously, the loop gain at $2fi_{\\\\text{in}}$ or $2f_{\\\\mathrm{o}}$ should be high enough for eliminating the SHC in the dc source or load. Thereafter, proper SHC reduction approaches are recommended for different types of two-stage single-phase converters, and pros and cons of different SHC reduction schemes are carefully reviewed. Finally, potential challenges and issues related to this research topic are discussed.\",\"PeriodicalId\":415217,\"journal\":{\"name\":\"2018 IEEE Energy Conversion Congress and Exposition (ECCE)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-01-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Energy Conversion Congress and Exposition (ECCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TPEL.2019.2894647\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Energy Conversion Congress and Exposition (ECCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TPEL.2019.2894647","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Control Schemes for Reducing the Second Harmonic Current in Two-Stage Single-Phase Converter: An Overview from DC-Bus Port-Impedance Characterization
The instantaneous input and output power of the single-phase converter are imbalanced, resulting in second harmonic current (SHC). This paper provides an insight for reducing the SHC in two-stage single-phase converter from the perspective of the dc-bus port-impedance characterization. It is found that the dc-dc converters in the two-stage single-phase converter can be categorized into two types. One is operating as a bus-voltage-controlled converter (BVCC) whose dc-bus port-impedance is approximately inverse-proportional to the voltage loop gain. The other is operating as a bus-current-controlled converter (BCCC) whose dc-bus port-impedance is a negative resistor. Based on the dc-bus port-impedance characterization, critical points for SHC reduction are summarized, indicating that, for reducing SHC in BVCC, proper control scheme needs be incorporated for increasing the dc-bus port-impedance at twice the input frequency $(2f_{\text{in}})$ or output frequency $(2f_{\mathrm{o}});$ concurrently, the dc bus voltage ripple should be limited for reducing the SHC in the dc source or load; by contrast, for reducing SHC in BCCC, the dc bus voltage ripple should be reduced; simultaneously, the loop gain at $2fi_{\text{in}}$ or $2f_{\mathrm{o}}$ should be high enough for eliminating the SHC in the dc source or load. Thereafter, proper SHC reduction approaches are recommended for different types of two-stage single-phase converters, and pros and cons of different SHC reduction schemes are carefully reviewed. Finally, potential challenges and issues related to this research topic are discussed.