四元倍增电路

W. Chu, K. Current
{"title":"四元倍增电路","authors":"W. Chu, K. Current","doi":"10.1109/ISMVL.1994.302225","DOIUrl":null,"url":null,"abstract":"A new quaternary multiplier circuit is presented. This current-mode CMOS circuit multiplies the values of two quaternary-valued input currents and adds a ternary-valued carry input current to generate the two-quaternary-digit output: a most-significant-digit ternary-valued CARRY output current and a quaternary-valued PRODUCT output current. This multiplier circuit uses 49 MOS transistors and generates its outputs in about 10 microseconds, worst case.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1994-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Quaternary multiplier circuit\",\"authors\":\"W. Chu, K. Current\",\"doi\":\"10.1109/ISMVL.1994.302225\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new quaternary multiplier circuit is presented. This current-mode CMOS circuit multiplies the values of two quaternary-valued input currents and adds a ternary-valued carry input current to generate the two-quaternary-digit output: a most-significant-digit ternary-valued CARRY output current and a quaternary-valued PRODUCT output current. This multiplier circuit uses 49 MOS transistors and generates its outputs in about 10 microseconds, worst case.<<ETX>>\",\"PeriodicalId\":137138,\"journal\":{\"name\":\"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-05-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.1994.302225\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1994.302225","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

摘要

提出了一种新的四元乘法器电路。该电流模式CMOS电路将两个四位数输入电流的值相乘,并加上一个三位数进位输入电流,生成两个四位数输出:一个最高有效位数的三位数carry输出电流和一个四位数PRODUCT输出电流。该倍增电路使用49个MOS晶体管,在最坏的情况下大约10微秒内产生输出。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Quaternary multiplier circuit
A new quaternary multiplier circuit is presented. This current-mode CMOS circuit multiplies the values of two quaternary-valued input currents and adds a ternary-valued carry input current to generate the two-quaternary-digit output: a most-significant-digit ternary-valued CARRY output current and a quaternary-valued PRODUCT output current. This multiplier circuit uses 49 MOS transistors and generates its outputs in about 10 microseconds, worst case.<>
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