45纳米及以上节点的自旋介电堆低k集成与EB固化技术

Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729) Pub Date : 2004-06-07 DOI:10.1109/IITC.2004.1345721

H. Nagai, K. Maekawa, M. Iwashita, M. Muramatsu, K. Kubota, K. Hinata, T. Kokubo, A. Shiota, M. Hattori, H. Nagano, K. Tokushige, M. Kodera, K. Mishima

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引用次数: 1

摘要

为了使有效k值小于3.0，我们研究了电子束固化的自旋介电堆damascene积分方案。采用多孔- msq (k=2.3)作为ILD，采用致密- msq (k=2.9)作为硬掩膜(HM)，可以降低有效k值，并且只对全介电层进行一次EB固化，可以提高ILD和HM的机械强度，减少热平衡。此外，还对低k材料的低抗损伤带工艺进行了评价。BEOL技术的这些元素适用于45纳米及以上的技术节点。

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Spin-on dielectric stack low-k integration with EB curing technology for 45nm-node and beyond

To achieve effective k value less than 3.0, we investigated spin-on dielectric stack damascene integration scheme with electron beam (EM) cure. By using porous-MSQ (k=2.3) as ILD and dense-MSQ (k=2.9) as hard mask (HM), effective k value could be lowered, and by EB curing the full dielectric stack only once, mechanical strength for both ILD and HM were improved and a reduced thermal budget was obtained. In addition, a low damage resist strip process for the low-k materials was evaluated. These elements of BEOL technology have applicability to 45nm technology node and beyond.

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Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729)

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