Investigation of a latch-up immune silicon controlled rectifier for robust ESD application

A latch-up immune robust SCR with an N+ top layer and an additional Nwell region (Nwell2) is proposed in this paper. The N+ top layer and Nwell2 divide the original SCR into three new SCRs with sharing emitter, which provide the deeper ESD current (Iesd) path to improve the holding voltage (Vh) and failure current (It2). The relation between Vh and base-concentration (Nb) for LVTSCR is given to provide an in-depth insight into the mechanism for enhancing Vh by changing Nb. The N+ top layer and NWELL2 form three base regions (B1, B2 and B3) with different concentration to optimize the IESD distribution and Vh. The longer ESD current path improves the Vh by reducing the current gain. The deeper current distribution makes the total temperature is endured by inner lattice instead of surface lattice, which improves the It2. DC and dynamic TLP simulation results show the Vh = 5.3 V of proposed SCR is achieved with a higher failure current (It2) of 1.68e-2A/μm.