{"title":"各种窄带LNA拓扑结构的设计与分析","authors":"Ahmed O. El Meligy, L. Albasha","doi":"10.1109/ICCSPA55860.2022.10019148","DOIUrl":null,"url":null,"abstract":"The objective of this paper is to design both a source inductor degenerated low noise amplifier (LNA) and a differential LNA that operate at a radio frequency of 2.4 GHz. The circuit parameters of the LNAs and the test benches are identified by considering the 180 nm generic process design kits (GPDK). The LNAs and test bench schematics are then developed on the Cadence Virtuoso Platform before conducting the simulations and analysis. The obtained results indicate that for the source inductor degenerated LNA, which uses MOSFETs with a gate width of $200\\ \\mu \\mathrm{m}$, a maximum gain of 21.4067 dB is achieved while retaining a minimum noise figure (NF) of 0.367 dB. Furthermore, the 1-dB compression point (PldB) and the input third-order inter-modulation product (IIP3) are found to be −8.172 and −0.513 dBm, respectively. On the other hand, for the differential LNA, using MOSFETs with a gate width of $96\\ \\mu \\mathrm{m}$, the maximum attainable gain is found to be 22.8 dB, and the minimum NF is 2.38 dB. Moreover, −16.634 and −6.547 dBm are obtained for the PldB and the IIP3, respectively.","PeriodicalId":106639,"journal":{"name":"2022 5th International Conference on Communications, Signal Processing, and their Applications (ICCSPA)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and Analysis of Various Narrow-Band LNA Topologies\",\"authors\":\"Ahmed O. El Meligy, L. Albasha\",\"doi\":\"10.1109/ICCSPA55860.2022.10019148\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The objective of this paper is to design both a source inductor degenerated low noise amplifier (LNA) and a differential LNA that operate at a radio frequency of 2.4 GHz. The circuit parameters of the LNAs and the test benches are identified by considering the 180 nm generic process design kits (GPDK). The LNAs and test bench schematics are then developed on the Cadence Virtuoso Platform before conducting the simulations and analysis. The obtained results indicate that for the source inductor degenerated LNA, which uses MOSFETs with a gate width of $200\\\\ \\\\mu \\\\mathrm{m}$, a maximum gain of 21.4067 dB is achieved while retaining a minimum noise figure (NF) of 0.367 dB. Furthermore, the 1-dB compression point (PldB) and the input third-order inter-modulation product (IIP3) are found to be −8.172 and −0.513 dBm, respectively. On the other hand, for the differential LNA, using MOSFETs with a gate width of $96\\\\ \\\\mu \\\\mathrm{m}$, the maximum attainable gain is found to be 22.8 dB, and the minimum NF is 2.38 dB. Moreover, −16.634 and −6.547 dBm are obtained for the PldB and the IIP3, respectively.\",\"PeriodicalId\":106639,\"journal\":{\"name\":\"2022 5th International Conference on Communications, Signal Processing, and their Applications (ICCSPA)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-12-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 5th International Conference on Communications, Signal Processing, and their Applications (ICCSPA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCSPA55860.2022.10019148\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 5th International Conference on Communications, Signal Processing, and their Applications (ICCSPA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCSPA55860.2022.10019148","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and Analysis of Various Narrow-Band LNA Topologies
The objective of this paper is to design both a source inductor degenerated low noise amplifier (LNA) and a differential LNA that operate at a radio frequency of 2.4 GHz. The circuit parameters of the LNAs and the test benches are identified by considering the 180 nm generic process design kits (GPDK). The LNAs and test bench schematics are then developed on the Cadence Virtuoso Platform before conducting the simulations and analysis. The obtained results indicate that for the source inductor degenerated LNA, which uses MOSFETs with a gate width of $200\ \mu \mathrm{m}$, a maximum gain of 21.4067 dB is achieved while retaining a minimum noise figure (NF) of 0.367 dB. Furthermore, the 1-dB compression point (PldB) and the input third-order inter-modulation product (IIP3) are found to be −8.172 and −0.513 dBm, respectively. On the other hand, for the differential LNA, using MOSFETs with a gate width of $96\ \mu \mathrm{m}$, the maximum attainable gain is found to be 22.8 dB, and the minimum NF is 2.38 dB. Moreover, −16.634 and −6.547 dBm are obtained for the PldB and the IIP3, respectively.