采用微型零度四路电流合成器的高增益和高PAE 68 ~ 94 GHz CMOS功率放大器

Yo‐Sheng Lin, Yun-Wen Lin, Jia-Wei Gao, K. Lan
{"title":"采用微型零度四路电流合成器的高增益和高PAE 68 ~ 94 GHz CMOS功率放大器","authors":"Yo‐Sheng Lin, Yun-Wen Lin, Jia-Wei Gao, K. Lan","doi":"10.1109/RWS.2018.8304964","DOIUrl":null,"url":null,"abstract":"This paper reports a wideband power amplifier (PA) for 77 GHz automobile radar and 94 GHz image radar systems in 90 nm CMOS process. The PA comprises a two-stage common-source (CS) cascaded input stage, followed by a two-way cascode gain stage using miniature zero-degree two-way divider and combiner, and a four-way CS output stage using miniature zero-degree four-way divider and combiner. At each branch's input terminal (i.e. drain terminal of the parallel CS output stage), the miniature zero-degree four-way combiner can convert the serial RL load to the optimal load impedance (corresponds to the optimal output power (Pout) and power-added efficiency (PAE)) of the output stage transistors. The PA achieves power gain of 23.9, 24.1 and 20.4 dB, respectively, at 71, 77 and 94 GHz. In addition, the PA achieves Pout of 12.3, 12.2 and 9.7 dBm, respectively, at 71, 77 and 94 GHz. The maximal PAE (PAEmax) is 18.2%, 17.3% and 8.9%, respectively, at 71, 77 and 94 GHz.","PeriodicalId":170594,"journal":{"name":"2018 IEEE Radio and Wireless Symposium (RWS)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"High gain and high PAE 68∼94 GHz CMOS power amplifier using miniature zero-degree four-way current combiner\",\"authors\":\"Yo‐Sheng Lin, Yun-Wen Lin, Jia-Wei Gao, K. Lan\",\"doi\":\"10.1109/RWS.2018.8304964\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper reports a wideband power amplifier (PA) for 77 GHz automobile radar and 94 GHz image radar systems in 90 nm CMOS process. The PA comprises a two-stage common-source (CS) cascaded input stage, followed by a two-way cascode gain stage using miniature zero-degree two-way divider and combiner, and a four-way CS output stage using miniature zero-degree four-way divider and combiner. At each branch's input terminal (i.e. drain terminal of the parallel CS output stage), the miniature zero-degree four-way combiner can convert the serial RL load to the optimal load impedance (corresponds to the optimal output power (Pout) and power-added efficiency (PAE)) of the output stage transistors. The PA achieves power gain of 23.9, 24.1 and 20.4 dB, respectively, at 71, 77 and 94 GHz. In addition, the PA achieves Pout of 12.3, 12.2 and 9.7 dBm, respectively, at 71, 77 and 94 GHz. The maximal PAE (PAEmax) is 18.2%, 17.3% and 8.9%, respectively, at 71, 77 and 94 GHz.\",\"PeriodicalId\":170594,\"journal\":{\"name\":\"2018 IEEE Radio and Wireless Symposium (RWS)\",\"volume\":\"46 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Radio and Wireless Symposium (RWS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RWS.2018.8304964\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Radio and Wireless Symposium (RWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RWS.2018.8304964","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文报道了一种用于77 GHz汽车雷达和94 GHz图像雷达系统的90 nm CMOS宽带功率放大器。PA包括一个两级共源级联输入级,其次是一个使用微型零度双向分频器和组合器的双向级联增益级,以及一个使用微型零度四路分频器和组合器的四路CS输出级。在每个支路的输入端(即并联CS输出级的漏极端),微型零度四路组合器可以将串行RL负载转换为输出级晶体管的最佳负载阻抗(对应于输出级晶体管的最佳输出功率(Pout)和功率附加效率(PAE))。该放大器在71 GHz、77 GHz和94 GHz时的功率增益分别为23.9、24.1和20.4 dB。此外,PA在71 GHz、77 GHz和94 GHz分别实现了12.3、12.2和9.7 dBm的输出。在71 GHz、77 GHz和94 GHz时,PAEmax的最大PAE分别为18.2%、17.3%和8.9%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High gain and high PAE 68∼94 GHz CMOS power amplifier using miniature zero-degree four-way current combiner
This paper reports a wideband power amplifier (PA) for 77 GHz automobile radar and 94 GHz image radar systems in 90 nm CMOS process. The PA comprises a two-stage common-source (CS) cascaded input stage, followed by a two-way cascode gain stage using miniature zero-degree two-way divider and combiner, and a four-way CS output stage using miniature zero-degree four-way divider and combiner. At each branch's input terminal (i.e. drain terminal of the parallel CS output stage), the miniature zero-degree four-way combiner can convert the serial RL load to the optimal load impedance (corresponds to the optimal output power (Pout) and power-added efficiency (PAE)) of the output stage transistors. The PA achieves power gain of 23.9, 24.1 and 20.4 dB, respectively, at 71, 77 and 94 GHz. In addition, the PA achieves Pout of 12.3, 12.2 and 9.7 dBm, respectively, at 71, 77 and 94 GHz. The maximal PAE (PAEmax) is 18.2%, 17.3% and 8.9%, respectively, at 71, 77 and 94 GHz.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信