栅极电阻优化CMOS射频性能增益

2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2016-05-22 DOI:10.1109/RFIC.2016.7508264

C. Schwan, K. Chew, Byounghak Lee, O. D. Restrepo, M. Kota, W. Chow, S. N. Ong, M. Cheng, X. S. Loo, R. Illgen, A. Huschka, M. Wiatr, Bhoopendra Singh, U. Kahler, J. Watts

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引用次数: 3

摘要

我们报告了通过预掺杂栅极多晶体来改善28nm CMOS技术的射频和数字交流性能的实验。从栅极的物理结构和栅极堆中栅极TiN/Si界面的原子结构两方面对结果进行了解释。

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CMOS RF performance gain by gate resistance optimization

We report experimental improvement of both RF and digital AC performance of a 28nm CMOS technology by predoping the gate poly. The results are explained in terms of the physical structure of the gate and the atomic structure of the gate TiN/Si interface in the gate stack.

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2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

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