嵌入式处理器中资源约束分支预测器的区域感知优化

Babak Salamat, A. Baniasadi, K. J. Deris
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引用次数: 2

摘要

现代嵌入式处理器(例如,Intel的XScale)使用小而简单的分支预测器来提高性能。这样的预测器占用的面积和功率很小,但准确度可能较低。因此,分支错误预测率可能很高。这样的错误预测会导致更长的程序运行时间和浪费的活动。为了解决这种低效率问题,我们引入了两种优化技术:首先,我们引入了一种自适应的低复杂度分支预测技术。我们的分支预测器最多可以去除双峰预测器的50%的分支错误预测。这将使性能提高多达16%。其次,我们提出了前端门控技术,并将浪费的活动最多减少了32%
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Area-Aware Optimizations for Resource Constrained Branch Predictors Exploited in Embedded Processors
Modern embedded processors (e.g., Intel's XScale) use small and simple branch predictors to improve performance. Such predictors impose little area and power overhead but may offer low accuracy. As a result, branch misprediction rate could be high. Such mispredictions result in longer program runtime and wasted activity. To address this inefficiency, we introduce two optimization techniques: first, we introduce an adaptive and low-complexity branch prediction technique. Our branch predictor removes up to a maximum of 50% of the branch mispredictions of a bimodal predictor. This results in improving performance by up to 16%. Second, we present front-end gating techniques and reduce wasted activity up to a maximum of 32%
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