{"title":"微相控阵天线控制系统设计","authors":"Xiaolei Li, Lina Zhang, Li-guo Cheng, Jianhui Zhu, Jiatong Wu","doi":"10.23919/CISS51089.2021.9652222","DOIUrl":null,"url":null,"abstract":"Micro-Nano and intelligent satellite products are the future development direction. As an important part of satellite products, the digital phased array antenna has established the satellite-ground data receiving and receiving channel, and the research of micro phased array antenna has become the key to design the control system of micro digital phased array antenna. In this paper, the digital phased array antenna control system is designed based on the core of DW8051 single chip microcomputer embedded in SRAM FPGA. At the same time, the anti-fuse FPGA is used for read-refresh design to correct the single particle flip error of SRAM FPGA. The timing control of T component, logic control of antenna array, remote control of power supply and other functions are completed, and the design of micro-digital phased array day control system is realized.","PeriodicalId":318218,"journal":{"name":"2021 2nd China International SAR Symposium (CISS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of micro-phased array antenna control system\",\"authors\":\"Xiaolei Li, Lina Zhang, Li-guo Cheng, Jianhui Zhu, Jiatong Wu\",\"doi\":\"10.23919/CISS51089.2021.9652222\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Micro-Nano and intelligent satellite products are the future development direction. As an important part of satellite products, the digital phased array antenna has established the satellite-ground data receiving and receiving channel, and the research of micro phased array antenna has become the key to design the control system of micro digital phased array antenna. In this paper, the digital phased array antenna control system is designed based on the core of DW8051 single chip microcomputer embedded in SRAM FPGA. At the same time, the anti-fuse FPGA is used for read-refresh design to correct the single particle flip error of SRAM FPGA. The timing control of T component, logic control of antenna array, remote control of power supply and other functions are completed, and the design of micro-digital phased array day control system is realized.\",\"PeriodicalId\":318218,\"journal\":{\"name\":\"2021 2nd China International SAR Symposium (CISS)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-11-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 2nd China International SAR Symposium (CISS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/CISS51089.2021.9652222\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 2nd China International SAR Symposium (CISS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/CISS51089.2021.9652222","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of micro-phased array antenna control system
Micro-Nano and intelligent satellite products are the future development direction. As an important part of satellite products, the digital phased array antenna has established the satellite-ground data receiving and receiving channel, and the research of micro phased array antenna has become the key to design the control system of micro digital phased array antenna. In this paper, the digital phased array antenna control system is designed based on the core of DW8051 single chip microcomputer embedded in SRAM FPGA. At the same time, the anti-fuse FPGA is used for read-refresh design to correct the single particle flip error of SRAM FPGA. The timing control of T component, logic control of antenna array, remote control of power supply and other functions are completed, and the design of micro-digital phased array day control system is realized.