{"title":"SiC MOSFET多芯片功率模块中消除串扰电压的功率门互感","authors":"Yu Zhou, Ankang Zhu, Yuting Jin, Chengmin Li, Haoze Luo, Wuhua Li, Xianging He","doi":"10.1109/peas53589.2021.9628657","DOIUrl":null,"url":null,"abstract":"The crosstalk issue in SiC MOSFET multi-chip power modules (MCPMs) is caused by both the capacitive and inductive couplings between the power loop and the gate loop. Compared to the capacitive ones, the inductive couplings introduced by layout traces reveal a contradictory effect under the low-impedance gate loop design, thus limiting the suppression effectiveness of active clamping. To alleviate this issue and suppress the inductive crosstalk from the origin, this paper proposes a cancellation layout structure to reduce the inductive power-gate couplings. At first, the fully-coupled inductance model for MCPMs is developed after analyzing the crosstalk mechanism considering inductive coupling. Then, based on the model, a coupling cancellation structure is designed by introducing the gate trace with the negative mutual inductance. As a result, the cancellation structure is compact, flexible, and easy to implement. Finally, simulations and experiments are conducted to verify the effectiveness of the proposed technique.","PeriodicalId":268264,"journal":{"name":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Cancellation of Power-Gate Mutual Inductance for Crosstalk Voltage Alleviation in SiC MOSFET Multi-chip Power Modules\",\"authors\":\"Yu Zhou, Ankang Zhu, Yuting Jin, Chengmin Li, Haoze Luo, Wuhua Li, Xianging He\",\"doi\":\"10.1109/peas53589.2021.9628657\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The crosstalk issue in SiC MOSFET multi-chip power modules (MCPMs) is caused by both the capacitive and inductive couplings between the power loop and the gate loop. Compared to the capacitive ones, the inductive couplings introduced by layout traces reveal a contradictory effect under the low-impedance gate loop design, thus limiting the suppression effectiveness of active clamping. To alleviate this issue and suppress the inductive crosstalk from the origin, this paper proposes a cancellation layout structure to reduce the inductive power-gate couplings. At first, the fully-coupled inductance model for MCPMs is developed after analyzing the crosstalk mechanism considering inductive coupling. Then, based on the model, a coupling cancellation structure is designed by introducing the gate trace with the negative mutual inductance. As a result, the cancellation structure is compact, flexible, and easy to implement. Finally, simulations and experiments are conducted to verify the effectiveness of the proposed technique.\",\"PeriodicalId\":268264,\"journal\":{\"name\":\"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-11-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/peas53589.2021.9628657\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 1st International Power Electronics and Application Symposium (PEAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/peas53589.2021.9628657","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
SiC MOSFET多芯片功率模块(mcpm)中的串扰问题是由功率回路和门回路之间的电容耦合和电感耦合引起的。与容性耦合相比,在低阻抗门环设计下,由布局走线引入的电感耦合呈现出矛盾的效果,从而限制了有源箝位的抑制效果。为了缓解这一问题,并从源头上抑制电感串扰,本文提出了一种抵消布局结构,以减少感应电源门耦合。首先,在分析了考虑电感耦合的串扰机理后,建立了mcpm的全耦合电感模型。在此基础上,通过引入负互感的栅极走线,设计了耦合抵消结构。因此,取消结构紧凑,灵活,易于实现。最后,通过仿真和实验验证了该方法的有效性。
Cancellation of Power-Gate Mutual Inductance for Crosstalk Voltage Alleviation in SiC MOSFET Multi-chip Power Modules
The crosstalk issue in SiC MOSFET multi-chip power modules (MCPMs) is caused by both the capacitive and inductive couplings between the power loop and the gate loop. Compared to the capacitive ones, the inductive couplings introduced by layout traces reveal a contradictory effect under the low-impedance gate loop design, thus limiting the suppression effectiveness of active clamping. To alleviate this issue and suppress the inductive crosstalk from the origin, this paper proposes a cancellation layout structure to reduce the inductive power-gate couplings. At first, the fully-coupled inductance model for MCPMs is developed after analyzing the crosstalk mechanism considering inductive coupling. Then, based on the model, a coupling cancellation structure is designed by introducing the gate trace with the negative mutual inductance. As a result, the cancellation structure is compact, flexible, and easy to implement. Finally, simulations and experiments are conducted to verify the effectiveness of the proposed technique.