iScan:在HOY测试平台上进行间接访问扫描测试

Chao-Wen Tzeng, Chun-Yen Lin, Shi-Yu Huang, Chih-Tsun Huang, J. Liou, Hsi-Pin Ma, Po-Chiun Huang, Cheng-Wen Wu
{"title":"iScan:在HOY测试平台上进行间接访问扫描测试","authors":"Chao-Wen Tzeng, Chun-Yen Lin, Shi-Yu Huang, Chih-Tsun Huang, J. Liou, Hsi-Pin Ma, Po-Chiun Huang, Cheng-Wen Wu","doi":"10.1109/VDAT.2009.5158095","DOIUrl":null,"url":null,"abstract":"In this paper, we introduce a new test paradigm called indirect-access scan test, demonstrated over the HOY test platform [12]. Unlike the traditional ATE-based testing, the test data in this paradigm are sent to the chip under test via packets over a single indirect channel. Although there is extra test time overhead for establishing the store-and-forward communication, it offers almost unlimited test memory - a highly desirable property since the large volume of test data today could easily blow up a traditional ATEs test memory. In addition to demonstrating the feasibility of this new paradigm, we also show that its efficiency can be substantially improved by two schemes; i.e., primary input (PI) data encoding and dynamic packet formatting. For a design with 155K gates, the speed-up achieved can be more than 50X.","PeriodicalId":246670,"journal":{"name":"2009 International Symposium on VLSI Design, Automation and Test","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"iScan: Indirect-access scan test over HOY test platform\",\"authors\":\"Chao-Wen Tzeng, Chun-Yen Lin, Shi-Yu Huang, Chih-Tsun Huang, J. Liou, Hsi-Pin Ma, Po-Chiun Huang, Cheng-Wen Wu\",\"doi\":\"10.1109/VDAT.2009.5158095\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we introduce a new test paradigm called indirect-access scan test, demonstrated over the HOY test platform [12]. Unlike the traditional ATE-based testing, the test data in this paradigm are sent to the chip under test via packets over a single indirect channel. Although there is extra test time overhead for establishing the store-and-forward communication, it offers almost unlimited test memory - a highly desirable property since the large volume of test data today could easily blow up a traditional ATEs test memory. In addition to demonstrating the feasibility of this new paradigm, we also show that its efficiency can be substantially improved by two schemes; i.e., primary input (PI) data encoding and dynamic packet formatting. For a design with 155K gates, the speed-up achieved can be more than 50X.\",\"PeriodicalId\":246670,\"journal\":{\"name\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on VLSI Design, Automation and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VDAT.2009.5158095\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2009.5158095","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

在本文中,我们引入了一种新的测试范式,称为间接访问扫描测试,并在HOY测试平台上进行了演示[12]。与传统的基于ate的测试不同,该范例中的测试数据通过单个间接通道上的数据包发送到被测芯片。尽管建立存储转发通信需要额外的测试时间开销,但它提供了几乎无限的测试内存——这是一个非常理想的特性,因为今天大量的测试数据很容易耗尽传统的ATEs测试内存。除了证明了这种新范式的可行性外,我们还表明,通过两种方案可以大大提高其效率;即,主输入(PI)数据编码和动态数据包格式化。对于具有155K门的设计,实现的加速可以超过50倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
iScan: Indirect-access scan test over HOY test platform
In this paper, we introduce a new test paradigm called indirect-access scan test, demonstrated over the HOY test platform [12]. Unlike the traditional ATE-based testing, the test data in this paradigm are sent to the chip under test via packets over a single indirect channel. Although there is extra test time overhead for establishing the store-and-forward communication, it offers almost unlimited test memory - a highly desirable property since the large volume of test data today could easily blow up a traditional ATEs test memory. In addition to demonstrating the feasibility of this new paradigm, we also show that its efficiency can be substantially improved by two schemes; i.e., primary input (PI) data encoding and dynamic packet formatting. For a design with 155K gates, the speed-up achieved can be more than 50X.
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